LPC804 SPI INTERFACE

[Sathiya_T]

Hi,

Am using LPC804 developement board for SPI interface  with MCU IDE,  when using the registers TXDAT and RXDAT are configured then only the SCK is  verified  in digital oscilloscope. i cant to verify the SCK of transmit data using TXDAT.

[BerlinRaj]

SYSCON->SPI0CLKSEL=1<<11; //explain this code

berlinraj_0-1697018883130.png

[xiangjun_rong]

Hi,

As the following pin movable function, you can configure the SPI0 pin to a pad with SWM module.

xiangjun_rong_0-1687139823366.png

I copy the Figure from UM11065.pdf

xiangjun_rong_1-1687140125532.png

xiangjun_rong_2-1687140272161.png

For example,in SPI master mode,  if you configure the

SWM->PINASSIGN2=0x04030201;

then SCK will output from PIO0_1

MOSI will output from PIO0_2,

MISO will input from PIO0_3;

SSEL0 will output to PIO0_4

In conclusion, pls check the SWM->PINASSIGN2 register to know the pin assignment of SPI

Note pls also check the section 8.5.12 PINENABLE 0 if the PIO0_x pin is multiplexed with analog function.

Hope it can help you

BR

XiangJun Rong

[Sathiya_T]

/* Initialize the SPI master with configuration. */

SYSCON->SYSAHBCLKCTRL0 |= (1<<11);
SYSCON->PRESETCTRL0 &=~(1<<11);
SYSCON->PRESETCTRL0 |=(1<<11);

SYSCON->SYSAHBCLKCTRL0 |= (1<<7);
SWM0->PINASSIGN_DATA[2] |= (0x1B)<<0;//port0-27
SWM0->PINASSIGN_DATA[2] |= (0x1A)<<8;//port0-26
SWM0->PINASSIGN_DATA[2] |= (0x1C)<<24;//PORT0-

/* Attach main clock to SPI0. */
CLOCK_Select(kSPI0_Clk_From_MainClk);

SPI0->DIV |=0X1D;
SPI0->CFG |= 0X05;
SPI0->DLY |=0X08;
SPI0->TXDATCTL |=0X07500000;

while (1)
{
//EXAMPLE_MasterStartTransfer();
while ((SPI0->STAT & SPI_STAT_TXRDY_MASK) == 0U)
{
}

SPI0->TXDAT = 0XAA;

}

This is our configuration in SPI. But there is no generation of clock and MOSI status changes. Kindly navigate us to configure properly.

[xiangjun_rong]

Hi,

Because the default value of SWM0->PINASSIGN_DATA[2] is 0xFFFF_FFFF, pls try to use the code

SYSCON->SYSAHBCLKCTRL0 |= (1<<7);

SWM0->PINASSIGN_DATA[2]=0x00;
SWM0->PINASSIGN_DATA[2] |= (0x1B)<<0;//port0-27
SWM0->PINASSIGN_DATA[2] |= (0x1A)<<8;//port0-26
SWM0->PINASSIGN_DATA[2] |= (0x1C)<<24;//PORT0-

Hope it can help you

BR

XiangJun Rong

[Sathiya_T]

As per your reference, clock generated properly but still no change in MOSI status

 SWM0->PINASSIGN_DATA[2] |= (0x1B)<<0;//port0-27
SWM0->PINASSIGN_DATA[2] |= (0x1A)<<8;//port0-26
SWM0->PINASSIGN_DATA[2] |= (0x18)<<24;//PORT0-24

SPI0->DIV =0X1D;
// SPI0->CFG = 0X15;
SPI0->DLY =0XF00;

SPI0->TXDATCTL =0X7410000;
SPI0->CFG |= 0X15;
while (1)
{
while ((SPI0->STAT & SPI_STAT_TXRDY_MASK) == 0U)
{
}
// SPI0->TXDATCTL |=0X075000FF;
SPI0->TXDAT = 0XAA;

}

[xiangjun_rong]

Hi,

Unfortunately, I have only LPCXPresso804(OM40001) board, where the 24 pins LPC804 is populated, the PIO0_24/26/27 are not routed to pads.

Pls try to move the MOSI to another pin and check if you can see the signal.

BR

XiangJun Rong

[Sathiya_T]

void SPI0_config(void)

{

//

//SYSCON->SYSAHBCLKCTRL0 |= 1<<11;  //Enable clock

//SYSCON->PRESETCTRL0 &=~(1<<11);             //SPI  clear

//SYSCON->PRESETCTRL0 |=(1<<11);

SYSCON->SYSAHBCLKCTRL0 |= 1<<7;             //SWM CLK

//SYSCON->PRESETCTRL0 &=~(1<<7);

//SYSCON->PRESETCTRL0 |=(1<<7);

SWM0->PINASSIGN_DATA[2]=0X00000000;

SWM0->PINASSIGN_DATA[2]|=(0X16)<<0;           //CLK PORT0-22

SWM0->PINASSIGN_DATA[2]|=(0X0F)<<8;          //MOSI PORT0-15

SWM0->PINASSIGN_DATA[2]|=(0X08)<<24;        //Chip select- SSEL0 PORT0-8

SYSCON->SYSAHBCLKCTRL0 |= 1<<11;  //Enable clock

SYSCON->SPI0CLKSEL|=1<<11;              //SPI CLK

SPI0->CFG = 0x125;                           //Master enable//CLK POLARITY 0X25;

SPI0->DLY =0x2000;                           //Enabled FRAME DELAY

SPI0->TXDATCTL =0X7430000;//843

SPI0->DIV = 0XA8;   

}

void send_byte(uint32_t txvalue)

{

while ((SPI0->STAT & SPI_STAT_TXRDY_MASK) == 0U)

    {

    }

SPI0->TXDAT = txvalue;

delay(20);

}

This is our updated configuration. Is the function is right? 

Here while passing the argument we not get the status MOSI pin but the clock generate properly. As a slave we connected ST7567 (FSTN display).

To transfer the data, we use send_byte() with required data as argument

[xiangjun_rong]

Hi,

I have tried your code, I suppose that the SPI clock is incorrect:

original line:

SYSCON->SPI0CLKSEL|=1<<11; //SPI CLK

change to

SYSCON->SPI0CLKSEL=1<<11; //SPI CLK

xiangjun_rong_0-1688704374312.png

The SEL default value is 7, which means none of SPI clock. After you or with 1, it is still 7, you should have been set it as 0x01.

I used the following code, I can see clock signal SCK and MOSI from PIO0_15/PIO0_16 of LPCXPresso804 board.

Hope it can help you

BR

XiangJun Rong

#include <stdio.h>
#include "board.h"
#include "peripherals.h"
#include "pin_mux.h"
#include "clock_config.h"
#include "LPC804.h"
#include "fsl_debug_console.h"
void SPI0_config(void);
/* TODO: insert other include files here. */

/* TODO: insert other definitions and declarations here. */

/*
* @brief Application entry point.
*/
int main(void) {

/* Init board hardware. */
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
#ifndef BOARD_INIT_DEBUG_CONSOLE_PERIPHERAL
/* Init FSL debug console. */
BOARD_InitDebugConsole();
#endif

PRINTF("Hello World\n");

/* Force the counter to be placed into memory. */
volatile static int i = 0 ;
/* Enter an infinite loop, just incrementing a counter. */
SPI0_config();
while (1)
{
while ((SPI0->STAT & SPI_STAT_TXRDY_MASK) == 0U)
{
}
// SPI0->TXDATCTL |=0X075000FF;
SPI0->TXDAT = 0XAA;
asm("nop");
}

while(1) {
i++ ;
/* 'Dummy' NOP to allow source level single stepping of
tight while() loop */
__asm volatile ("nop");
}
return 0 ;
}

void SPI0_config(void)
{
//
//SYSCON->SYSAHBCLKCTRL0 |= 1<<11; //Enable clock
//SYSCON->PRESETCTRL0 &=~(1<<11); //SPI clear
//SYSCON->PRESETCTRL0 |=(1<<11);

SYSCON->SYSAHBCLKCTRL0 |= 1<<7; //SWM CLK

//SYSCON->PRESETCTRL0 &=~(1<<7);
//SYSCON->PRESETCTRL0 |=(1<<7);

SWM0->PINASSIGN_DATA[2]=0X00000000;
SWM0->PINASSIGN_DATA[2]|=(0x10)<<0; //CLK PIO0_16PORT0-22
SWM0->PINASSIGN_DATA[2]|=(0X0F)<<8; //MOSI PORT0-15
SWM0->PINASSIGN_DATA[2]|=(0X08)<<24; //Chip select- SSEL0 PORT0-8

SYSCON->SYSAHBCLKCTRL0 |= 1<<11; //Enable clock

SYSCON->SPI0CLKSEL=1<<11; //SPI CLK
SPI0->CFG = 0x125; //Master enable//CLK POLARITY 0X25;
SPI0->DLY =0x2000; //Enabled FRAME DELAY
SPI0->TXDATCTL =0X7430000;//843

SPI0->DIV = 0XA8;
}