Hi, Mike,
As you know that PWM output signals from the CTIMER are trailing edge alignment PWM signals, when the counter begins, all PWM signal are low, when the counter reaches to the match register value, the PWM signal becomes high, it remains high until the PWM cycle is over. There is no way to get the leading-edge alignment PWM signals.
If possible, you can connect an external inverter gate, and you can invert the PWM signals so that you can get trailing edge alignment signals for the multiple PWM signals.
Hope