LPC55S6x Default System Clock

[mate]

Hi!

I'm new in LPC55S6x series MCUs. I'm using LPCXpresso55S69 (Rev. A2). I'm started write some system startup code as I did it before in my old LPC17xx library. I prefer my own source codes instead of the SDK.

I had some problem during system init, when the Main Clock and the System Clock is going to be switched from the default FRO 12MHz (AHBCLKDIV=0 (divide by 1)) to PLL0 25MHz (AHBCLKDIV=0 (divide by 1)). PLL setup is correct and it's stability is checked after configuration. I do the Internal Voltage configuration and Flash Acceess Time setting as it is described by the User Manual in 14.4, on page 287. When I set the Main Clock Select A and B MUXes (MAINCLKSELA, MAINCLKSELB) and the System Clock Divider (AHBCLKDIV), the program jumped to HardFault. I've tried several PLL setups and register writing orders, but I had got HardFault at the end around setting MUXA, MUXB and AHBCLKDIV.

After some debugging I found that, some of the register reset values are different from the values written in the user manual:

MAINCLKSELA: SEL=3 (FRO 96M), datasheet: SEL=1 (FRO 12M)

MAINCLKSELB: SEL=0 (Main Clock A), datasheet: SEL=0 (Main Clock A)

AHBCLKDIV: DIV=1 (divide by 2), datasheet: DIV=0 (divide by 1)

So, the system clock is 48MHz instead of 12MHz!

I've also checked the Flash Access Time setting in FMCCR, FLASHTIM=4 (5 system clocks flash access time (for system clock rates up to 55 MHz)). This value corresponds to the 48MHz system clock value.

I've checked an SDK examle "lpcxpresso55s69_lpadc_polling" for comparing my code. The BOARD_BootClockPLL150M() starts with:

CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */

This line would have saved me a lot of time if I had looked at the SDK examplein in time, but I don't like solutions "just for sure". So I would like to understand what the situation is.

Does anyone had this issue earlier, or maybe am I thinking somethin wrong?

[nxf77486 · Accepted solution]

Hello @mate ,

Sorry I didn’t understand your question in the first instance, and you are correct I just verified the information you provide from MAINCLKSELA and AHBCLKDIV registers reset values, and the reset value for this registers does not match the information provide in our User Guide. Thanks for noticing I already reported this in order to update the User Guide. An apology for the problems that this could cause.

[nxf77486]

Hello @mate  ,

The clock configuration sometimes might be complicated just by getting into the User Guide, in order to understand how it works. Here is a LPC's system clocks guide that will help you out in the configuration of the clocks.

Please let me know if you have any questions.

LPC's System Clocks

https://community.nxp.com/t5/LPC-Microcontrollers-Knowledge/LPC-s-System-Clocks/ta-p/1149864

[mate]

Hi!

Thanks for your reply!

Yes, you are right, the clocking of the LPC5500 series is quite complex, but it is understandable. I know the LCP Knowledge Base "LPC's System Clocks" article. It also says that:

"These 96MHz and 12MHz output frequencies come from a Free Running Oscillator of 192MHz. The 12MHz output provides the default clock at reset and provides a clean system clock shortly after the supply pins reach operating voltage."

So the default clock should be 12MHz. The register values (mentioned previously) right after MCU reset differs from the values written in the MCU's User Manual. These values result 48MHz as system core clock, not 12MHz. It doesn't matter if I'm running my own code or any of the SDK example codes on the EVAL board. So I think if there is something it must be on hardware side.