LPC55S69: ISP mode pin utilization

[EugeneHiihtaja]

Hello !

In Table 171. is quite clearly specified what kind of pins can be initialized when bootrom try to select peripheral for communication.

But how those pins are really uninitialised, as peripherals pins only or also some PU/PD resistors are added.

We have used a lot of pins and would like to be sure if ROM initialization is not cause any deadlock for our functionality.

At beginning MCU is empty and MCU go to ISP mode automatically and scan all possible interfaces.

But even after initial flashing , when we can limit scan to SPI3 and HS_SPI and use ISP pin for put MCU in ISP mode we have 8 pins from both interfaces what need special care.

Do you have advanced info about initialisation of those pins in ROM code ?

Regards,

Eugene

[FelipeGarcia]

Hi Eugene,

You can refer to Fig 11 in User Manual. The boot flow chart will give you an idea of when ISP pins and peripherals are enabled and disabled.

Hope it helps!

Best regards,

Felipe

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[EugeneHiihtaja]

Hi felipegsoto‌ !

You means that external pins is fully initialized at once as well ?

For example UART can initialize peripheral and RX line only. When activity is detected, TX line can be attached to UART peripheral as well.

For us is important how external GPIO line configurations changing during ISP active scan.

Also ROM is not cleaning Clock tree and Power domains when it jump to application.

Flexcomm clocks remains attached and USB powerdomains remain enabled.

I think it is not so good. ROM in Secure MCU should leave clean landscape.

I haven't find out also why USB RAM is wiped to 0x00 after reboot.

May be it is cleaned as well.

Regards,Eugene

[FelipeGarcia]

It is correct, all the corresponding peripherals are enabled at once. After an active peripheral is detected, inactive peripherals are disabled.

Regards,

Felipe