LPC5536JBD100 Silicon 0A

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LPC5536JBD100 Silicon 0A

282件の閲覧回数
mf89
Contributor I

Hi.

We just saw a message in pin_mux.c

    /* Note: PIO0_31 I3C0_SCL only works on A1 chip. */
    IOCON->PIO[0][31] = ((IOCON->PIO[0][31] &
                          /* Mask bits to zero which are setting */
                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_OD_MASK)))

                         /* Signal(function) select: PORT031 (pin 23) is configured as I3C0_SCL. */
                         | IOCON_PIO_FUNC(0x0Fu)

                         /* Select Digital mode: Enable Digital mode.
                          * Digital input is enabled. */
                         | IOCON_PIO_DIGIMODE(PIO0_31_DIGIMODE_DIGITAL)

                         /* Controls open-drain mode: Open-drain.
                          * Simulated open-drain output (high drive disabled). */
                         | IOCON_PIO_OD(PIO0_31_OD_OPEN_DRAIN));

 

It says PIO0_31 I3C0_SCL only works on A1 chip. Is this true ?? If yes how is that not documented anywhere clearly ?

We just have a whole Prototype Series of PCBs that go to the trash if this is correct.

This should be marked in RED color and Double the Font Size in the Datasheet.

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101件の閲覧回数
danielholala
Senior Contributor II

I agree. Errata like this should be more clearly marked and not hidden in a footnote. Marked in red color and bold print would do.

 

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245件の閲覧回数
Harry_Zhang
NXP Employee
NXP Employee

Hi @mf89 

Yes, this is explained in the comments.

Harry_Zhang_0-1752478709050.png

Thanks for your understanding.

BR

Harry

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