LPC5512: UART DMA Unknown size of Rx transfer

[brunomelaneo]

Hi there,

I am new to the NXP / freescale SDK eco system and I am having some difficulties implementing a serial communication protocol on LPC5512 using USART and DMA.

From I understood so far (maybe I am wrong), when using DMA one must know in advance the size in bytes of the next Rx transfer. This is a problem while implementing the new communication protocol, because its individual messages have variable length, and since one cannot guess which message will be transmitted next the DMA Rx transfer size cannot be set. Is my understanding correct? (If not what am I missing?)

To work around this, I am currently using 1 byte long Rx transfers and, although it works, it seems to be a terribly inefficient implementation to have one interrupt per byte received.

After some research I've read about some solutions like:
1 Triggering an interrupt when the physical Rx line goes idle for some time after an Rx begins
2 Triggering an interrupt when a specific byte pattern is received

This specific communication protocol messages allows for timeouts between messages and the messages have specific header and trailer markers which could be used to detect the message boundaries. So both solutions could be adopted. However, these solutions were adopted for STM32 MCUs. From all the documentation and SDK src code reading so far, I am not sure such interrupt mechanisms are available in the LPC5512 MCU. Are they?

Is it there a way to implement this king of behavior for the LPC5512 using DMA transfers? I've look into the SDK for some similar examples but I could not find any. If it is indeed possible could someone provide an example?

It would be much appreciated!
Kind regards,
Bruno.

[brunomelaneo]

Hello once again,

I am reading the following in the LPC55S1x/LPC551x "Product data sheet" section §7.24.3.4 USART:

... however I cannot find some of these interrupts (Receiver Idle, Rx Ready, Tx Ready) listed in the "UM11295 User Manual" §34.6.4 INTENSET.

Do such interrupts actually exist? Is this a discrepancy in the documentation?

[Alice_Yang]

Hello,

There is receive interrupt. 

For your case ,recommend you use DMA transmit + interrupt receive,

refer to the USART DMA demo and interrupt demo. 

BR

Alice

[brunomelaneo]

Alice,

appreciate the suggestion, but using the RXLVL means using USART interrupts only but not the DMA, right? Also, wouldn't one would fall into the same issue as before with DMA Rx, i.e., since the size of the incoming message is unknown one cannot set the FIFOTRIG:RXLVL to trigger the interrupt at the end of the message. (unless,of course we use the same inefficient work around as stated before: set the registers to fire the interrupt every 1 byte received).

Could you clarify my previous doubt: do the "Receiver Idle, Rx Ready" in "LPC55S1x/LPC551x Product data sheet" section §7.24.3.4 USART" actually exist and missing from the "UM11295 User Manual §34.6.4 INTENSET"... or the "UM11295 User Manual" is correct and the "LPC55S1x/LPC551x Product data sheet" section §7.24.3.4 USART" should be corrected?

[Alice_Yang]

Hello,

"appreciate the suggestion, but using the RXLVL means using USART interrupts only but not the DMA, right? Also, wouldn't one would fall into the same issue as before with DMA Rx, i.e., since the size of the incoming message is unknown one cannot set the FIFOTRIG:RXLVL to trigger the interrupt at the end of the message. (unless,of course we use the same inefficient work around as stated before: set the registers to fire the interrupt every 1 byte received).

"

->> Yes, you are right.

"Could you clarify my previous doubt: do the "Receiver Idle, Rx Ready" in "LPC55S1x/LPC551x Product data sheet" section §7.24.3.4 USART" actually exist and missing from the "UM11295 User Manual §34.6.4 INTENSET"... or the "UM11295 User Manual" is correct and the "LPC55S1x/LPC551x Product data sheet" section §7.24.3.4 USART" should be corrected?

"

->> I think  UM11295 is correct, because  there is no related register with the interrupts DS mentioned.

BR

Alice

[Alice_Yang]

Hello,

How about check RXBRK:

[brunomelaneo]

Hi Alice,

is a line break the same as idle line?

Please correct me if I am wrong but, when  a line is “idle” isn’t its logic level “high”? If this is correct then the Rx break you suggest (“…low for 16 bit times…”) is not the same and it probably means there is a problem in the physical line.

So unfortunately I cannot see how using the RXBRK and the DELTARXBRK interrupt would be useful. Am i overlooking any important detail?

Do you have any other suggestion?