I'm very excited about the announcement of the new LPC5500 family.
I'm especially curious about the DSP accelerator. Is it accessed as extension instruction set? Or is it a coprocessor? Or is it a peripheral?
Will LPC5500 microcontrollers be for IoT only? Or will be there Industrial applications chips, like Motor control and digital power conversion?
I found more information about the new LPC5500 coprocessor:
Is it using floating point or fixed point calculations?
Anyway, based on the figure, the performance gain are impressive.
This family is oriented for Industrial and IoT applications.
Single- or Dual-core Cortex-M33 with integrated DC-DC delivers industry-leading performance at a fraction of power budget, of up to 90 CoreMarks™/mA. The high density of on-chip memory, up to 640KB flash and 320KB SRAM, enables efficient execution of complex edge applications. Further, NXP's autonomous, programmable logic unit for offloading and execution of user-defined tasks delivers enhanced real-time parallelism. For more information about the LPC5500 series, click here.
Can you tell us when the LPC5500 documentation will be available?
In my opinion, the LPC5xxx analog and digital peripheral sets are too weak for a dual core 100MHZ cortex-m33 with co-processor and 40nm technology.
NXP should had done it based on the much better kinetis KV5x and K80 peripheral set.
Sounds like they are using the coprocessor interface of the M33. That's good - like with the FPU, you can move 64 bits per cycle across it. Much better than the peripheral bus.
I'm curious what kind of operations it accelerates too. The DSP functions in the M33 are pretty decent, the same as the Cortex M4. I'm guessing it widens the number of multiplies per cycle, maybe does fast matrix multiplies.