LPC54628 RAM error check on powerup

[aswinprabhu]

Hello,

I am using LPC54628 and want to perform a basic RAM error check on power-up. For this I plan to write 0xFF, 0x55, 0xAA and 0x00 to each RAM location in SRAM banks SRAM0, SRAM1, SRAM2 & SRAM3 and do a read back

(Though I can see from the *.map file that all my variables are stored in SRAM0 only, I would want to check all SRAM banks).

Code:

SRAM0_start_address = 0x2000000;
SRAM3_end_address = 0x20027FFF;

// write 0xFF and read back
for (uint32_t i=0; i< SRAM3_end_address; i++){
   *(SRAM_start_address + i) = 0xFF;
   if (  *(SRAM_start_address + i) != 0xFF ){
       return kStatus_Fail;
   }
}

// similarly write 0xAA, 0x55 and 0x00 and read back

return kStatus_Success;

Query: Is the way in which I am addressing each SRAM location by using pointers correct? If not, can you please point out the mistake? Since the SRAM start & end locations as well as the variable 'i' are also stored in SRAM, wouldn't the value in these variables get corrupted as the test progresses due to overwriting?

Thanks in advance.

[Sebastian_Del_Rio]

Hi Aswin, I hope you're doing well!

Unfortunately, I'm not sure if I'm understanding your question correctly.

Are you implementing a RAM check to verify if all of the RAM is operating normally after a reset? Have you experienced problems with the RAM on your device?

Best regards,

Sebastian

[aswinprabhu]

Hi,

Thanks for the reply.

1) Yes, I am trying to verify that the SRAM is working correctly after power-up.

2) I have not faced any problems with the SRAM so far. This is more like a check that will be performed at power up so that in case there is a problem with the SRAM, it can be detected. In your opinion, is such a SRAM check unnecessary?

Regards.

[frank_m]

I would suppose it is not necessary - except you require a certain safety level for your application.

In that case, I would consider a MCU tailored for safety application, like the automotive industry often uses.

My company has an older ECU design (which now fell out of favour ...) which does a regular codespace check at runtime, and an emulation of safe storage for critical data. The latter are stored at double size, one value normal and one value inverted. If both do not add up, the ECU throws an error.

For your RAM test: First, I would use the bus width for check item size, i.e. 32 bit for internal SRAM (not 0xFF, but 0xFFFFFFFF). Second, you would need it in your startup code, before initialisation, and constant values are copied in. And including the stack space will have catastrophic results ...

IMHO it would make sense for external RAM. Almost all modern Cortex M MCUs have ECC-checked SRAM.