Sorry I wasn't clear. I will try to strip my code down to something I can post here. In the meantime, let me try to explain.
The FIFO write data register as described on page 384 of UM10914 Rev 2.0 states:
"FIFOWR provides the possibility of altering some SPI controls at the same time as
sending new data. For example, this can allow a series of SPI transactions involving
multiple slaves to be stored in a DMA buffer and sent automatically.These added fields
are described for bits 16 through 27 below.
Each FIFO entry holds data and associated control bits. Before data and control bits are
pushed into the FIFO, the control bit settings can be modified. Halfword writes to just the
control bits (offset 0xE22) doesn't push anything into the FIFO. A zero written to the upper
halfword will not modify the control settings. Non-zero writes to it will modify all the control
bits. Note that this is a write only register. Do not read-modify-write the register."
The part in bold is what I am struggling with. In my application I only want to shift out new data without changing the configuration (upper 16 bits). If I write to the lower 16 bits (data field) without writing the upper 16 bits (configuration), or with the upper 16 bits set to zero, the configuration is still overwritten. This requires me to always write all 32 bits. My options are to either double the size of my look-up table to also contain the configuration word, or to perform an intermediate DMA write, pulling my 16bit of data from the LUT, combining it in RAM with the configuration bits, and then moving the 32bit concatenated value to the SPI peripheral. Option one requires too much memory, option two adds too much latency.
I hope this is a little more clear. Thanks in advance for any help you can provide!
