LPC54114 SBL boot_jump dual core only m4 runs and m0+ not responding

[mcpata2002]

Hello everybody,

I have finished a SBL with USB HID and IAP to flash user application (APP) to sector 1 (0x8000), SBL changes VTOR and boot_jump (AN10866) successfully IF the APP uses only m4 core.

If the APP uses both cores, the m4master part can run (test includes SysTick, GPIO, PIN_INT, and USART), but the m0slave part didn't work.

To verify the APP I've changed it back to run from 0x0, flash to the board, and it works perfect.

Slave code runs in SRAM1, address 0x20010000. I have dump the bytes and calculate the CRC of the bytes in SRAM1 inside main() of m4master, right before calling Chip_CPU_CM0Boot(). The bytes and the CRC is the same and also matches m0slave.axf.o no-matter the APP starts from 0x0 or places under  0x8000 and trigger by SBL.

Looking forward ideas and suggestions to help solving this problem.

Many Thanks & Best Regards!

[Humphrey32]

Yes, I got the same issue in boot jump dual-core FaceTime for PC

[Alice_Yang]

Hello ,

" but the m0slave part didn't work."

>> Dose it can run into M0 project?

[mcpata2002]

m0slave do NOT run if m4master is boot_jump from SBL.

The m0slave is reduced to only turn on an LED, so it's pretty sure not running at all.

[Alice_Yang]

Hello ,

Do you only download the .bin of M4 project? (Because it includes the M0 project.)

And how about also reduce the M4 project to test.

Regards,

Alice

[mcpata2002]

Dear Alice,

I have flash the m4 (include m0) .bin via USB + my SBL and use IAP to write to flash sectors 1~7 (address 0x8000 onwards).

In main() of master, before Chip_CPU_CM0Boot() the slave [I use lpcopen], I have also checked SRAM1 (0x20010000) contains the slave code. Since I have also generate the .bin file of m0slave, I have its checksum and I also print all bytes to FC0, checked all bytes are the same as the m0slave.bin, before boot up the m0 slave.

I have also check that BEFORE I boot_jump from SBL to 0x8000, SRAM1 at 0x20010000 didn’t contain the m0slave code. This also proves boot_jump has called ResetISR of the code in 0x8000, otherwise SRAM1 should not appear at all.

Any test I can do to further help locating the problem?

Many Thanks & Best Regards,

Ken

[Alice_Yang]

Hello,

How about first disable interrupt in M0 project?

If still can't work, you can send your project to my email if it can reproduce on LPC54114 demo board, I help to check on my side.

Regards,

Alice

[mcpata2002]

Dear Alice,

Even if m0 only turn on one LED it still won't go.

May I have your email address?

Best Regards,

Ken

[Alice_Yang]

Hello Ken,

I have checked your project on my side,there is some conflict about the pin configurations in your bootloader code and application code.

When I disable //Init_EZ(); in your bootloader project, the LED on application project can work.

So please check Pin configuration carefully, or you can test resetting pins before jump to application .

Recommend use the lib driver to config, for example

change

// v
LPC_GPIO->DIR[0] &= 0b11111110111111111111111111111111; // INPUT
// 33222222222211111111110000000000
// 10987654321098765432109876543210
LPC_GPIO->DIR[0] |= 0b00100000000000000000000000000000; // OUTPUT
// ^

to use

Chip_GPIO_SetPinDIRInput();

Or it easy to mistake.

Please try to check and locate issue as I mentioned, you can first disable some code just like me.

Regard,

Alice

[mcpata2002]

Dear Alice,

    Thanks for your help and investigation but I can't repeat your success on my side.

    The m4 works, but the m0 didn't, which is the same as what I have before. After playing more rounds, even m4 not working every time. After debugging by adding m4.axf to "Other Symbols" of the Debug configuration, found that the volatile int in m4 being overwritten with strange value. I will try to learn how to use other memory segment for volatile variables.

    A good new to share. Among these two weeks I have created a dual core SBL by linking an empty slave with the SBL master. While flashing user application through IAP, I keep the size and flash memory location of the m0.bin so that when SBL do a "normal" boot, it's the SBL to memcpy() the m0.bin to 0x20010000, and then it's the SBL calling boot_multicore_slave() to start the m0+ core, and finally SBL calling the boot_jump() to m4.bin. That means the m0+ core is started by the SBL, not by the user application after boot_jump().

This might be more troublesome because I cannot use the .bin file generated with both m4 and m0 by the IDE but it's so far repeatably stable. The only thing to note so far is that the Chip_PININT_Init(LPC_PININT) need to be called by SBL instead of m4 nor m0 because it's not only enable the PININT but also RESET the PININT. Additional PinMux, SetPinDIR, configure PININT, EnableIRQ, UART_Init, etc are still good leaving in m4.bin and m0.bin.

Many Thanks again for your investigation, and I will leave more time to redo this again targets to flash the dual core .bin build from IDE as a flashing target in the next project.

Best Regards,

Ken

[Alice_Yang]

Hello,

" I cannot use the .bin file generated with both m4 and m0 by the IDE "

->Do you meaning you need two separate .bins, that m4 .bin doesn't includes m0.bin?

[mcpata2002]

Dear Alice,

     Yes. Up to now the only way I can achieve a stable SBL that supports dual core is as below:

1. Separate build m4.bin (without m0.bin inside) and m0.bin
2. Use my own way to transfer m4.bin and m0.bin separately to the SBL and IAP to flash
3. Upon normal boot, SBL copy m0.bin from flash to RAM (0x20010000)
4. Start the m0 core by SBL, not done by m4.bin
5. Be aware that some Chip_ or Board_ function call will do reset. These should be done inside SBL.
6. Finally, be careful since m4.bin will start "later than" m0.bin, be aware of racing conditions.

     I think there should be something wrong among my previous tries and there should be a way to fix it. Will allocate time in next project(s).

Best Regards,

Ken

[Alice_Yang]

Hello Ken,

Ok, thanks for your sharing.

Just uncheck "M0SLAVE " as below will separate build M4.bin.

Regards,

Alice

[mcpata2002]

Dear Alice,

I know this trick but I cannot do the reverse, i.e. I cannot add the example_slave.axf.o back here. The IDE didn't allow me to set the "Master memory region" to RAM2. It will automatically switch back to MFlash256.

When I need to debug the slave, I need to switch the things back to "single bin file with both master and slave" and use the IDE to step through it. Can you suggest how to add the M0SLAVE back to the master project?

Many Thanks & Best Regards,

Ken