LPC54102 - Read State of Input Pin Configured for Input Capture

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LPC54102 - Read State of Input Pin Configured for Input Capture

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BTaylor
Contributor III

I have a pin on the LPC54102 configured as a capture input for one of the standard counter/timers (CT32Bx). Further, I have things configured such that the Capture Register is loaded - and an interrupt is generated - on both a rising edge and a falling edge for the pin.

When an interrupt is generated for a capture event, how can I determine whether or not the event was a 'rising edge' event or a 'falling edge' event?

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Assume that you use the PIO1_5 pin as FUNC 3, which functions as CT32B1_CAP0, in the  ISR of capture event of CT32B1, you can read the GPIO->PIN[1] and check bit 5 for example

bool flag;

flag=GPIO->PIN[1]&0x20;

 

Even if you configure the PIO1_5 as FUNC 3 with IOCON->PIO[1][5]|=3; I still think you can read the GPIO input register to get the pin current logic.

 

Hope it can help you

BR

XiangJun Rong

 

xiangjun_rong_0-1671763250351.png

 

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BTaylor
Contributor III

Even if you configure the PIO1_5 as FUNC 3 with IOCON->PIO[1][5]|=3; I still think you can read the GPIO input register to get the pin current logic.

That is precisely what I hoped was the case. Thank you.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Assume that you use the PIO1_5 pin as FUNC 3, which functions as CT32B1_CAP0, in the  ISR of capture event of CT32B1, you can read the GPIO->PIN[1] and check bit 5 for example

bool flag;

flag=GPIO->PIN[1]&0x20;

 

Even if you configure the PIO1_5 as FUNC 3 with IOCON->PIO[1][5]|=3; I still think you can read the GPIO input register to get the pin current logic.

 

Hope it can help you

BR

XiangJun Rong

 

xiangjun_rong_0-1671763250351.png

 

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