LPC54018 customised board SPI communication issue

[Renuga_AKAS]

Hi,

    In LPC54018 EVK board (180 PINs), we're able communicate with ST7789V (TFT Driver) via SPI interface (FLEXCOMM 9). But proceeding the same with our customized LPC54018 (208 PINs) board, we can't able to communication. Even the SPI clock signal has not generated (always low). Is there any major difference in 180 PINs and 208 PINs board (like changes in FLEXCOMM PINs, packages, driver)?

Here we used FLEXCOMM 9,

For 1. CS PIN - Port 3 30th PIN

2. SCL PIN - Port 3 20th PIN

3. MOSI PIN - Port 3 21st PIN

[Pavel_Hernandez]

Hello, 

Could you share an imagen of where is the code stuck?

Best regards,
Pavel

[Renuga_AKAS]

Hi @Pavel_Hernandez,

     We're not stuck in the code. The issue is we're not getting the clock signal in SPI SCK PIN, after flashing the code successfully, while checking the SPI clock PIN, the clock pin remains low. We're using keil uvision tool for flash downloading (ULINK2).

[frank_m]

What I would do:
Add code that initializes the same (SPI CLK) pin as GPIO, and toogle it.
Step through this toggle code with a debugger, and measure with a voltmeter.
That would rule out some mistake with the pin assignment or layout.

[Renuga_AKAS]

Hi,

    Actually we tried SPI polling master example from MCUxpresso SDK example in LPC54018 EVK board
(180 PINs), even in EVK board also SPI clock has not generated. After changing the peripheral
clock configuration as 96MHZ, adding the BOARD_BootClockPLL180M() and transfer delay as 6
we got the SPI clock pulse in EVK board.

Here I have attached the SDK example configurations.

CODE 1:

CLOCK_AttachClk(kFRO12M_to_FLEXCOMM9);

RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);

const uint32_t port3_pin20_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_SCK */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN20_IDX, port3_pin20_config); /* PORT3 PIN20 (coords: N2) is configured as FC9_SCK */
const uint32_t port3_pin21_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_RXD_SDA_MOSI */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN21_IDX, port3_pin21_config); /* PORT3 PIN21 (coords: P5) is configured as FC9_RXD_SDA_MOSI */
const uint32_t port3_pin22_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_TXD_SCL_MISO */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN22_IDX, port3_pin22_config); /* PORT3 PIN22 (coords: N5) is configured as FC9_TXD_SCL_MISO */
const uint32_t port3_pin30_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_CTS_SDA_SSEL0 */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN30_IDX, port3_pin30_config); /* PORT3 PIN30 (coords: K13) is configured as FC9_CTS_SDA_SSEL0 */

SPI_MasterGetDefaultConfig(&userConfig);
srcFreq = EXAMPLE_SPI_MASTER_CLK_FREQ;
userConfig.sselNum = (spi_ssel_t)EXAMPLE_SPI_SSEL;
userConfig.sselPol = (spi_spol_t)EXAMPLE_SPI_SPOL;
SPI_MasterInit(EXAMPLE_SPI_MASTER, &userConfig, srcFreq);

The following configuration made SPI working

CODE 2:

/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);

/* attach 12 MHz clock to SPI9 */
CLOCK_AttachClk(kFRO_HF_to_FLEXCOMM9);//kFRO12M_to_FLEXCOMM9);

/* reset FLEXCOMM for SPI */
RESET_PeripheralReset(kFC9_RST_SHIFT_RSTn);

// BOARD_InitPins();
CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */

const uint32_t port3_pin20_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_SCK */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN20_IDX, port3_pin20_config); /* PORT3 PIN20 (coords: N2) is configured as FC9_SCK */
const uint32_t port3_pin21_config = (
IOCON_PIO_FUNC1 | /* Pin is configured as FC9_RXD_SDA_MOSI */
IOCON_PIO_MODE_PULLUP | /* Selects pull-up function */
0x40 |
IOCON_PIO_INV_DI | /* Input function is not inverted */
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
);
IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN21_IDX, port3_pin21_config); /* PORT3 PIN21 (coords: P5) is configured as FC9_RXD_SDA_MOSI */
IOCON->PIO[3][30] = ((IOCON->PIO[3][30] &
/* Mask bits to zero which are setting */
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))

/* Selects pin function.
* : PORT330 (pin K13) is configured as FC9_CTS_SDA_SSEL0. */
| IOCON_PIO_FUNC(0x01)

/* Select Analog/Digital mode.
* : Digital mode. */
| IOCON_PIO_DIGIMODE(0x01));

// BOARD_BootClockPLL180M();
// BOARD_InitBootClocks();
// BOARD_InitDebugConsole();
/*!< Set up the clock sources */
/*!< Set up FRO */
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
being below the voltage for current speed */
POWER_DisablePD(kPDRUNCFG_PD_SYS_OSC); /*!< Enable System Oscillator Power */
SYSCON->SYSOSCCTRL = ((SYSCON->SYSOSCCTRL & ~SYSCON_SYSOSCCTRL_FREQRANGE_MASK) | SYSCON_SYSOSCCTRL_FREQRANGE(0U)); /*!< Set system oscillator range */
/*!< Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U)
before calling this API since this API is implemented in ROM code */
CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
POWER_SetVoltageForFreq(180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
/*!< Set up SYS PLL */
const pll_setup_t pllSetup = {
.pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U),
.pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)),
.pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)),
.pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)),
.pllRate = 180000000U,
.flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP
};
CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Set sys pll clock source*/
CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */
/*!< Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U)
before calling this API since this API is implemented in ROM code */
CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */

/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */

/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch MAIN_CLK to SYS_PLL */
SYSCON->FROHFDIV = ((SYSCON->FROHFDIV & ~SYSCON_FROHFDIV_DIV_MASK) | SYSCON_FROHFDIV_DIV(0U)); /*!< Set FROHF CLKDIV to value 0 */
CLOCK_AttachClk(kFRO_HF_to_FLEXCOMM9); /*!< Switch FLEXCOMM9 to FRO_HF */
SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(0U)); /*!< Switch MAINCLKSELA to FRO12M even it is not used for MAINCLKSELB */
/*!< Set SystemCoreClock variable. */
SystemCoreClock = 180000000U;//BOARD_BOOTCLOCKPLL180M_CORE_CLOCK;
// PRINTF("\n\rMaster Start...\n\r");
/*
* userConfig.enableLoopback = false;
* userConfig.enableMaster = true;
* userConfig.polarity = kSPI_ClockPolarityActiveHigh;
* userConfig.phase = kSPI_ClockPhaseFirstEdge;
* userConfig.direction = kSPI_MsbFirst;
* userConfig.baudRate_Bps = 500000U;
*/
// SPI_MasterGetDefaultConfig(&userConfig);
srcFreq = 96000000;//EXAMPLE_SPI_MASTER_CLK_FREQ;
userConfig.enableLoopback = false;
userConfig.enableMaster = true;
userConfig.polarity = kSPI_ClockPolarityActiveHigh;
userConfig.phase = kSPI_ClockPhaseFirstEdge;
userConfig.direction = kSPI_MsbFirst;
userConfig.baudRate_Bps = 500000U;
userConfig.dataWidth = kSPI_Data8Bits;
userConfig.sselNum = (spi_ssel_t)EXAMPLE_SPI_SSEL;
userConfig.sselPol = (spi_spol_t)EXAMPLE_SPI_SPOL;
userConfig.txWatermark = (uint8_t)kSPI_TxFifo0;
userConfig.rxWatermark = (uint8_t)kSPI_RxFifo1;
userConfig.delayConfig.frameDelay = 0;
userConfig.delayConfig.postDelay = 0;
userConfig.delayConfig.preDelay = 0;
userConfig.delayConfig.transferDelay = 6;
SPI_MasterInit(EXAMPLE_SPI_MASTER, &userConfig, srcFreq);

why we can't configure the SPI below 96MHZ?. Eventhough we're using the same package (96MHz)
in our customized board, clock pulse doesn't generated?

[frank_m]

These are logic pin numbers.
Did you check the outbound physical pins are still correct with the changed MCU package ?

Your component placement / soldering might be incorrect.

Your PCB layout might be inappropriate, and unable to sustain the high frequencies properly.

You are providing very little information. Only you have the schematics, the firmware and the physical boards, so the initiative must come from your side.