LPC43xx - maximum external memory size

[zzzmqp]

I'm looking for confirmation of the maximum external memory sizes that can be used with the LPC43xx controllers (with a single chip).

Per UM10503:

SDRAM

(23.3 Features):

16-bit and 32-bit wide chip select SDRAM memory support with up to four chip selects
and up to 256 MB of data.
• Controller supports 2 kbit, 4 kbit, and 8 kbit row address synchronous memory parts.
That is typical 512 MB, 256 MB, and 128 MB parts, with 4, 8, 16, or 32 data bits per
device.

But (Table 434):

1 Gb (32Mx32)

So is the max for SDRAM at the EMC

• 128 Mbyte (1Gb) or
• 512 Mbyte (using DYCS2+DYCS3, I guess?)

SPIFI (Table 445.):

SPIFI data 0x1400 0000 to 0x17FF FFFF (Use this memory area for debugging code and for
slightly improved performance).
0x8000 0000 to 0x87FF FFFF (Debug will not work if the program counter is in this
memory area).
Remark: These are the spaces allocated to the SPIFI in the LPC43xx. The same
data appears in the first area and the first half of the second area. These areas
allow up to 64 MB and up to 128 MB of SPI flash to be mapped into the Cortex-M4
memory space. In practice, the usable space is limited to the size of the connected
device.

And for Serial Flash at the SPIFI, the maximal addressable/usable memory size is

• 128 Mbyte?

Thanks!

[bernhardfink · Accepted solution]

• Using SPIFI address 0x8000 0000 allows for a 128MByte qSPI flash
• 1GBit SDRAM is possible as a 32M x 32 as shown in the users manual. But I only know these SDRAMs as mobile SDRAM with a 1.8V interface, working with level shifters is not possible. So finally you end up with 512MBit devices as maximum memory size in one chip. But you could place 4 of them on DYCS[3:0].

Regards,

NXP Support Team

[zzzmqp]

Excellent, thank you bernhardfink‌!