LPC43xx + GPDMA + SSP (burst size&)

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LPC43xx + GPDMA + SSP (burst size&)

793 次查看
mryakimovya
Contributor I

Hey, there! I have a little confusion about the stuff. I use SSP0 + GPDMA. According to CMSIS lib burst size tx is 4 bytes, burst size rx is 4 bytes too. So, there is rare occasion when tx channel (I set it to 1, for example) has finished transferring data, but rx channel (0, highest priority) doesn't. And field size in config register equals to 4 bytes. It works perfectly well if I set rx burst size to 1 byte. Also, if I manually trigger burst line for SSP0 rx FIFO those 4 bytes also come. Field size in config register is set to 0. So my question comes: which request line to DMA is used for SSP0 RX FIFO? Is it for all fifo full or single bytes, or both? Which burst size for rx must I set?

Thanks in advance!

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604 次查看
Carlos_Mendoza
NXP Employee
NXP Employee

Hi Youry,

The Rx SSP DMA request will become active when the Rx FIFO is at least half full. In your case, the source transfer width should match the SSP Data Size and the burst size should be the number of frames you plan to receive.


Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer

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604 次查看
mryakimovya
Contributor I

Hi Carlos!

Ok, so if my frames aren't align to some definite number of bytes I should set rx burst size to 1 byte. So I did. I works pretty well for almost long time)))

Thank you!!!

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