LPC4370 FPU Enable

[JiaAn]

Hello NXP expert,

I'm using LPC4370 (LPC-Link2). IDE: MCUXpresso 10.3.1.

I saw there's FPU on the M4 core. I would like to enable it. Can you tell me step by step how to enable it and how to check if it's working?

Thanks.

[xiangjun_rong]

Hi, Jian

I attach the user manual of Cortex-M4 core, pls refer to section 4.6 Floating Point Unit (FPU).

As Frank said that the MCUXpresso tools generates the code to use FPU.

Hope it can help you

BR

XiangJun Rong

[xiangjun_rong]

Hi,

Pls download the Cotex-M4 generic user's guide from the link:

https://developer.arm.com/documentation/dui0553/b

Hope it can help you

BR

Xiangjun Rong

[frank_m]

Except selecting the proper MCU for the MCUXpresso project, usually nothing.

The FPU is enabled in the SystemInit() function in system_LPCxxx.c if CMSIS is enabled (which it is by default), or directly in the startup code (startup_lpcxxx.c). Both sources are automatically added to your project.

The "xxx" is a placeholder for your exact MCU type. For one of my examples, it is e.g. 54628.

[JiaAn]

@frank_m 

Thanks!

I found following code in my cr_startup_lpc43xx.c

#if !defined (__USE_LPCOPEN)
// LPCOpen init code deals with FP and VTOR initialisation
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
/*
* Code to enable the Cortex-M4 FPU only included
* if appropriate build options have been selected.
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
*/
// CPACR is located at address 0xE000ED88
asm("LDR.W R0, =0xE000ED88");
// Read CPACR
asm("LDR R1, [R0]");
// Set bits 20-23 to enable CP10 and CP11 coprocessors
asm(" ORR R1, R1, #(0xF << 20)");
// Write back the modified value to the CPACR
asm("STR R1, [R0]");
#endif // (__VFP_FP__) && !(__SOFTFP__)
// ******************************
// Check to see if we are running the code from a non-zero
// address (eg RAM, external flash), in which case we need
// to modify the VTOR register to tell the CPU that the
// vector table is located at a non-0x0 address.

// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
if ((unsigned int *) g_pfnVectors != (unsigned int *) 0x00000000) {
// CMSIS : SCB->VTOR = <address of vector table>
*pSCB_VTOR = (unsigned int) g_pfnVectors;
}
#endif

But I still can't understand how to enable it. Can you give me a hand, please? Thank you so much.

[frank_m]

I don't have your MCU / board, so cannot reproduce it directly.

But is the following code you posted active, or grayed out ?

#if !defined (__USE_LPCOPEN)
// LPCOpen init code deals with FP and VTOR initialisation
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
/*
* Code to enable the Cortex-M4 FPU only included
* if appropriate build options have been selected.
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
*/
// CPACR is located at address 0xE000ED88
asm("LDR.W R0, =0xE000ED88");
// Read CPACR
asm("LDR R1, [R0]");
// Set bits 20-23 to enable CP10 and CP11 coprocessors
asm(" ORR R1, R1, #(0xF << 20)");
// Write back the modified value to the CPACR
asm("STR R1, [R0]");
#endif // (__VFP_FP__) && !(__SOFTFP__)

If it's not grayed out (i.e. white background), this code is executed and enables the FPU.

[JiaAn]

@frank_m  I guess it's active. Is there any way I can confirm if it's working?

[frank_m]

The very specific code you are posted seems not active. Which might not be a problem, LPCOPEN is AFAIK a predecessor of the current MCUXpresso SDK, and supported for backward compatibility reasons. This might not be used/enabled in your application.

I would suggest to search for CMSIS in your startup code. For me, it looks like this (in startup_lpc54628.c):

#if !defined (__USE_CMSIS)
// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
// will enable the FPU
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
    //
    // Code to enable the Cortex-M4 FPU only included
    // if appropriate build options have been selected.
    // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
    //
    // Read CPACR (located at address 0xE000ED88)
    // Set bits 20-23 to enable CP10 and CP11 coprocessors
    // Write back the modified value to the CPACR
    asm volatile ("LDR.W R0, =0xE000ED88\n\t"
                  "LDR R1, [R0]\n\t"
                  "ORR R1, R1, #(0xF << 20)\n\t"
                  "STR R1, [R0]");
#endif // (__VFP_FP__) && !(__SOFTFP__)
#endif // (__USE_CMSIS)

To be sure, you can fire up the debugger, and check the FPU init code is executed. Or check the respective flags in the core config registers afterwards.

For LPCopen / LPCware, I am no expert, though.

[converse]

To test if it is active, try writing some floating point code. Note that the FPU in LPC4370 is *single-precision* (i.e. only supports float in C. If you use double, the compiler will convert into library calls to emulate it).

See also this FAQ

https://community.nxp.com/t5/LPCXpresso-IDE-FAQs/Cortex-M4-Floating-Point-Support/m-p/469344

[frank_m]

To be totally sure, you would need to check the generated instructions.

There is an emulation version for floating point code which does not require a FPU (FP ABI type "soft").

[converse]

The string of replies here, could make this confusing, so to summarise:

LPC4370 includes a single precision floating point unit. That is, it supports C float, but not double

The floating point unit is initialised by the startup code, or if using CMSIS or LPCOpen, then the startup code calls a library function that will enable the FPU. Whatever library, or not, you do not need to do anything - it is enabled for you.

The default compiler setting automatically use floating point unit. See the FAQ for distinction between different ABI types: https://community.nxp.com/t5/LPCXpresso-IDE-FAQs/Cortex-M4-Floating-Point-Support/m-p/469344

You can just write code that uses float and the FPU will be used. You can see this in the debugger - which will show the FPU registers, or by disassembling the generated code.

Hope that helps