LPC436x and LPC4370 datasheet typos in section 7.3.1?

[AndrewBradford]

In the LPC436x and LPC4370 datasheets, in section 7.3.1 "ARM Cortex-M0 coprocessor" it says:

"The M0 coprocessor resides on the same AHB multi-layer matrix as the main Cortex-M0 core."

Shouldn't this instead say:

"The M0 coprocessor resides on the same AHB multi-layer matrix as the main Cortex-M4 core."

The M0 coprocessor *IS* the main Cortex-M0 core, the main processor is the Cortex-M4 core.  The "ARM Cortex-M0 subsystem" is the *other* M0 core and it is not on the main AHB matrix, it has its own bus connected to the main AHB matrix via a bridge over with the SGPIO.

[bernhardfink]

May I correct this :smileycool:

The Cortex-M4 and the Cortex-M0APP are connected as masters on the same AHB multi-layer matrix, the M0SUB is behind a bridge. So as you stated correctly:

"The Cortex-M0APP coprocessor resides on the same AHB multi-layer matrix as the main Cortex-M4F core."

This applies to all LPC4300 family members, only the LPC4367 and the LPC4370 include the additional M0SUB as well.

Regards,

Bernhard.

[jeremyzhou]

Hi Andrew Bradford,

Thank you for your interest in NXP Semiconductor products and 

for the opportunity to serve you.

The LPC43xx/LPC43Sxx is a multi-core microcontroller implementing an ARM Cortex-M4
and one or two ARM Cortex-M0 cores, the M0 co-processor resides on the same AHB multi-layer matrix as the main Cortex-M0 core, and the other ARM Cortex-M0 core (M0SUB) as the Cortex-M0 subsystem.

So I don't think it's a typo.

Have a great day,

TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------