LPC4357 Exclusive Access Issue

[lpcware]

Content originally posted in LPCWare by Sal Ammoniac on Wed Sep 24 21:36:39 MST 2014
My RTOS has a small assembly procedure to set a memory location using the Cortex-M4's exclusive access feature. It uses this in the mutex lock function. The code is in the code block below. On extremely rare occasions, it fails to set the memory location passed to in in R0, I'm running this code with interrupts turned off as the Cortex-M4 instruction set manual says that an interrupt between the ldrex and strex instructions resets the exclusive access monitor. I'm not using DMA and I'm not using the Cortex-M0 in the 4357.

Is there any other reason why this code should fail when called with the memory location pointed to by R0 is already 0?

  .thumb_func
setmutex:
      ldrex r1,[r0]         // initiate exclusive access
      cbnz  r1,1f           // branch if it's already set
      mov   r2,#1           //
      strex r1,r2,[r0]      // try setting location to 1
1:
      mov   r0,r1           // set return value = 0 if set succeeded, 1 if set failed
      bx    lr              // return

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Sep 25 13:22:01 MST 2014
There's probably a billion other things it wouldn't work for. But it wasn't designed for those either.

[lpcware]

Content originally posted in LPCWare by Sal Ammoniac on Thu Sep 25 13:04:23 MST 2014
You're right. For mutexes it's fine. It wouldn't work for counting semaphores, however.

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Sep 25 12:36:48 MST 2014
Why would that cause a problem? By definition, you already have exclusive access. Given this is published by ARM, I'd be pretty confident that it works.

[lpcware]

Content originally posted in LPCWare by Sal Ammoniac on Thu Sep 25 11:18:43 MST 2014
Thanks. I wasn't aware that a DMB instruction was needed when using the exclusive access instructions.

Interesting, too, that the example code clears the lock just by setting it to zero rather than using the exclusive access instructions. Seems to me like this would cause a problem.

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Sep 25 00:31:53 MST 2014
This is what ARM recommends:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHEJCHB.html