LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0

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LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0

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Contributor I

Is there any problem with initializing LPC_TIMER0 on the M4 core and then calling Chip_TIMER_ReadCount(LPC_TIMER0) asynchronously on both the M4 and M0 cores to allow for synchronized timing functions between both cores?  

Thanks,

Greg Dunn

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NXP Employee
NXP Employee

There shouldn't be a problem. Both cores are bust masters and can read at any point in time from peripheral resources. The one which reads first will get first.

What is always dangerous:

while (x < 1000)

{

   x = read_timer(timer0);

}

If you poll with full CPU speed on a register, even simultaneously with two different cores, then you might see weird system behavior.

Regards,

Bernhard.

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NXP Employee
NXP Employee

There shouldn't be a problem. Both cores are bust masters and can read at any point in time from peripheral resources. The one which reads first will get first.

What is always dangerous:

while (x < 1000)

{

   x = read_timer(timer0);

}

If you poll with full CPU speed on a register, even simultaneously with two different cores, then you might see weird system behavior.

Regards,

Bernhard.

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Contributor I

Thank you very much for the clarification!

Greg

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