你好， Maggie
请参考下面的信息配置FLASH BANK A/B加速配置寄存器：
Flash Accelerator Configuration for flash bank A register (FLASHCFGA, address 0x4004 3120);
Flash Accelerator Configuration for flash bank B register (FLASHCFGB, address 0x4004 3124).
Following reset, flash accelerator functions are enabled and flash access timing is set to a default value of 16 clocks.
If customer want to modify the [FLASHTIM] value of FLASHCFGA/B register, please refer below code:
LPC_CREG->FLASHCFGA = (0xF << 12) | (0x1 << 31);
LPC_CREG->FLASHCFGB = (0xF << 12) | (0x1 << 31);
我们提供在线支持。如果想要现场支持，请联系你当地NXP代理商，他们会提供上门支持的。
你当地的NXP代理商联系方式可以通过这里找到。
商祺。
Have a great day,
Ma Hui
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