LPC4330-Xplorer Performance issues, SPIFI

[lpcware]

Content originally posted in LPCWare by WHLShort on Wed Nov 26 00:48:22 MST 2014
Hi

Struggling with a LPC4330-Xplorer gaining performance (minimizing latency) using external flash, the flash has been changed to a faster type - S25FL127S. The original board was shipped with a S23FL025P, that could be pushed to 80MHz SPIFI clock and not the next clockwise step, 102M. The S25FL127S can run 108MHz.
I have tested both flash devices on both 68MHz, both working fine, but when the S25FL127 is clocked at 102MHz, the system isn't working. The NXP device is prepared to run 204MHz on the SPIFI bus, way beyond the used clock, and the flash does also have a little head room, clockwise.

Is the issue caused the PCB layout on the Xplorer board - this might not be designed to run above 100MHz, or what am I doing wrong?

Any ideas ?

[lpcware]

Content originally posted in LPCWare by bavarian on Wed Dec 03 05:09:09 MST 2014
Did you initialize the SPIFI pins to high speed ?
[list]
  [*]  This is a setting which just configures the pins for good electrical performance at this high frequency
[/list]


Did you prepare the SPI flash for this clock speed ?
[list]
  [*]  Also the qSPI device needs to be prepared for the higher speed (see links below)
[/list]


Did you perform the clock setup change from SRAM or did you bite the hands which feed you ?
[list]
  [*]  Changing the clock setup for the SPIFI might generate some sort of glitches on the interface (from the qSPI point of view) which can cause a crash.
  [*]  You need to locate the function which is doing the clock change in internal SRAM. This requires to locate the SPIFI library in SRAM as well
[/list]


There are a few posts in the forum with regards to the SPIFI, this ones below also contains some useful source code which shows how to deal with the SPIFI on a lower level:

http://lpcware.com/content/blog/introduction-spifi

http://www.lpcware.com/content/forum/spifi-errata-and-part-version-information#comment-1023028


Regards,
NXP Support Team.

[arpad_toth]

How is it possible to to change the SPIFI clock speed? I didn't find a divider for it.

[lpcware]

Content originally posted in LPCWare by WHLShort on Thu Nov 27 14:06:37 MST 2014
Hi mc

When running the system at 68MHz, the system can startup and run the application from flash. When the frequency is changed to 102MHz the application does not startup. The system executes until the clock part is set, but afterwards the application stops.

[lpcware]

Content originally posted in LPCWare by mc on Wed Nov 26 08:00:39 MST 2014
Hi WHLShort,
Please see comments below..

---

Quote:
I have tested both flash devices on both 68MHz, both working fine, but when the S25FL127 is clocked at 102MHz, the system isn't working.

---

Do you mean device does not work at all at 102MHz or there is performance issue?

Which SPIFI library are you using?

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Wed Nov 26 03:47:31 MST 2014
I can't comment on the PCB layout, but a number of people have asked in previous threads about relocating performance critical code from SPIFI to RAM in the past, which might be a useful alternative for you to explore. For example:

http://www.lpcware.com/content/forum/running-code-ram
http://www.lpcware.com/content/forum/running-cmsis-dsp-library-function-ram

The following FAQ may also be of use
http://www.lpcware.com/content/faq/lpcxpresso/placing-specific-functions-ram-blocks

Regards,
LPCXpresso Support