LPC4088 memory interface layout

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LPC4088 memory interface layout

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flavioalpino
Contributor I

Hello,

I need info about layout constraints between LPC4088 micro and an SDRAM dinamic RAM chip.

I would like to know how to trace address, controls and data lines, lines matching, impedence....

How can I get these info?

Could you suggest some application note or datasheet?

The memory I have to interface is an ISSI IS42S32800G working at about 133MHz.

Thank you very much

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soledad
NXP Employee
NXP Employee

Hello Flavio,

Please check the below application notes.

http://www.nxp.com/documents/application_note/AN11508.pdf

http://www.nxp.com/documents/application_note/AN10935.pdf


Have a great day,
Sol

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