LPC1800 with S25FL256SA SPIFI problem

[SantoshMengade]

LPC1800 is interfaced with external flash memory S25FL064P1F on SPIFI interface. The code present in external flash memory S25FL064P1F is read and executed properly. To increse memory size we just replaced S25FL064P1F by S25FL256SA1F00 on board and stored same code in it. We are observing that code execution speed has reduced significantly in new flash memory S25FL256SA1F00.

I want to know what need to be done to increase code execution speed from new flash memory S25FL256SA1F00.

Please help me.

Thank you!

[SantoshMengade]

Thank you for your valuable reply.

The code execution speed from new external flash S25FL256S has improved significantly after increasing SPIFI clock. 

There is one more observation regarding LPC1800 communication over SPIFI with old flash S25FL064P and new flash S25FL256S.

a. When LPC1800 communicate with flash S25FL064P, data appears on 4 data lines IO0,IO1,IO2,IO3 which means that communication takes place in quad mode. 

b. When LPC1800 communicate with flash S25FL256S, data appears on 2 data lines IO0,IO1 which means that communication does not takes place in quad mode. This is because S25FL256S is default working at dual IO or single IO mode. To get data on IO2 and IO3, quad  mode need to be set in flash IC using its configuration register. 

The LPC1800 SPIFI is currently working in memory mode and same is confirmed as SPIFI status register bit 'MCINIT' is 1.  To send command to S25FL256S to configure quad mode in it I aborted LPC1800 SPIFI memory mode by settting RESET bit in  SPIFI status register to 1 and saved command in SPIFI command register. But because of memory mode termination by RESET bit 1, code exexution from flash comes to end and therefore code to save command in SPIFI command register is not executed and quad mode is not set in flash S25FL256S.

I want to know how can I send command to flash after abort memory mode. In which sequence SPIFi registers need to be configured? 

Please help.

[ZhangJennie]

Hi SantoshMengade 

For the SPIFI flash , the speed is affected by SPIFI clock. with 1-, 2-, or 4-bit data at rates of up to 52 MB per second.

In order to improve the performance:

1) Set the clock for SPIFI to maximum.

2) Move the critical code to SRAMX to improve performance.

3) Try to reduce function call in XIP code.

Hope this helps,

Jun Zhang