LPC55S69 USB0 current leakage on DP and DM pins

[sherif_ashraf]

Hello,

We have a design using LPC55S69 where we have USB0_DP and USB0_DM pins disconnected and left floating. We are seeing current leakage on those 2 pins when we introduce a resistor or humidity.

My question, is it possible to pull the pins in a certain direction internally? Or disable them from being inputs?

We are not seeing the same behavior on USB1_DP and USB1_DM pins, which are also disconnected and left on floating state.

Thank you.

[xiangjun_rong]

Hi,

As the section 6.1.1 Termination of unused pins in data sheet of LPC556x, the USB DP and DM pins of both USB0 and USB1 should be float(no connection) if you do not use them.

The external pull-up or pull-down resistors are not commended, which can leads to current leakage.

Hope it can help you

BR

XiangJun Rong

[sherif_ashraf]

Hey XiangJun,

Thank you for your reply.

So in our design when we have the mcu in power down mode the whole board is consuming 13uA, which is excellent for our design and the amount of ram we are retaining.

We are seeing a behavior when we touch the mcu on the row where USB0 DP and DM pins exist that current leakage happens.

This also happens when we introduce humidity, or when we put the board in a temperature chamber and cool it down(Which causes condensation), or when we touch a resistor to the pins while the mcu is asleep. There is leakage coming from USB0 DP and DM pins. This only happens on USB0 pins and not USB1.

Is there anything we can do to prevent this from happening?

We can replicate the same behavior on unused GPIO pins if we initialize them in IOCON as input NO PULL. When we pull them down internally then this issue goes away.

Is there anything we can do on the mcu to replicate same behavior on USB0 pins?

Sherif

[xiangjun_rong]

Hi,

Sorry for the delay.

I have discussed the issue with AE engineer, we can not explain the phenomenon either that the leakage current rises when you put the silicon in humidity environment, or touch it with hand, we think that the uA current is too small, it is subject to external environment.

Because you do not use the USB0_DP/DM, if you pull-down the the USB0_DP/DM pins via 10K ohm pull-down resistor, what is the result?

BR XiangJun Rong

[sherif_ashraf]

Hey,

No worries at all about a delay, thank you for looking into it.

We already tested pull up/down tests and here are our results:

1. No pulling, introducing touch or humidity we are seeing a current consumption spike of 1-2mA (Up from 13uA)
2. Pulling down DM and DP, the spike goes up to 70-80uA.
3. Pull down DM and pulling up DP, the spike goes up to 50uA.
4. No pulling DM or DP, but taking out 3.3V from USB0_3V3 pin. (We leave the pin floating). The spike becomes in the range of 25-35uA.

Pull resistor used were 40K.

Is it ok if we leave USB0_3V3 pin floating?

Thanks again.

Sherif

[AleGuzman]

Hi Sherif, 

If you never use the USB in your application leaving the USB0_3V3 only source the USB PHY; therefore, it will not cause your application to halt. 

But I will recommend having the external pull-downs with USB0_3V3 connected. 

At what low temperature did you start noticing this high leakage?

Regards,
Alejandra

[AleGuzman]

Hi, 

We cannot guarantee that there will not be any leakage because forcing a short in the pins through humidity are outside the MCU operating conditions. 

According to the datasheet, the USB0_3V3 needs to be tied to the same VDD_MAIN potential. 

Regards, 
Alejandra