LPC1768, UART full duplex ?

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LPC1768, UART full duplex ?

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rnb
Contributor II

Hello LPC users,

I'm using an UART3 to exchange data with an external device. UART3 set to 8 bits, no parity, 1200bauds, RX data interrupt enable.Here are the settings for UART3:

    LPC_SC ->PCONP |= (1<<25);
    //select clock PCLK=CCLK/4 (clear bits 14:15)
    LPC_SC ->PCLKSEL1 &= ~(PCLK_UART3_MASK) ;

    // PINSEL9 Pin so that P4.28 = TXD3 and P4.29=RXD3
    //  25:24 P4.28 GPIO Port 4.28 RX_MCLK MAT2.0 TXD3
    //  27:26 P4.29 GPIO Port 4.29 TX_MCLK MAT2.1 RXD3
    LPC_PINCON->PINSEL9 |=  ((3 << 24) | (3 << 26));

    LPC_UART3 ->LCR = 0x83;        // 8 bits, no Parity, 1 Stop bit, DLAB=1

    // Settings value assume a 25MHz base frequency - clock is 100Mhz and PCLKSEL1=0 (so PCLK=CCLK/4)
    // for 4800 bds:
    LPC_UART3 ->FDR = 0xe3 ;        // MULVAL=0x0e; DIVADDVAL=0x03     0xe3
    LPC_UART3 ->DLL = 0x0c ;        // DLL 0x0c
    LPC_UART3 ->DLM = 0x01 ;        // DLM 0x01

    LPC_UART3 ->IER = 0x01;            // Enable RX DATA interrupt

    LPC_UART3 ->LCR &= (~(0x80)) ;    // erase DLAB
    LPC_UART3 ->FCR = 0x07;            // Enable FIFO and reset TX and RX FIFO, trigger IRQ at first character received
    LPC_UART3 ->TER |= (1<<7);      // UART_TER_TXEN    !< Transmit enable bit
    LPC_UART3 ->IER = 0x01;            // Enable RX DATA interrupt, requires DLAB=1 ?
    NVIC_EnableIRQ(UART3_IRQn);
    NVIC_SetPriority(UART3_IRQn , 0); // set highest priority

However, I experiment some collisions in the received data frame, and RX data are loss.
Looking into LPC user manual, I notice that both registers for RX and TX (respectively named U3RBR and U3THR) are pointing on the same address?
Is this possible, in such conditions to get UART working in full duplex ?

Any clue ?

Thank's

René

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kerryzhou
NXP TechSupport
NXP TechSupport

Hello customer,

     Although the RX and TX are pointing on the same address, but I think it actually is the separated register. You can check the diagram.

pastedImage_1.png

Read return the contents of read only received data buffer, and write go to the write-only transmit data buffer.

You said some collisions in the received data frame.

 I don't know how you test it, and what the code in your UART ISR.

 Take an example, you can just test receive, no transmit, do you also meet the collisions in the received data?

This is the lpcopen code, you can refer to it:

void Chip_UART_IRQRBHandler(LPC_USART_T *pUART, RINGBUFF_T *pRXRB, RINGBUFF_T *pTXRB)
{
    /* Handle transmit interrupt if enabled */
    if (pUART->IER & UART_IER_THREINT) {
        Chip_UART_TXIntHandlerRB(pUART, pTXRB);

        /* Disable transmit interrupt if the ring buffer is empty */
        if (RingBuffer_IsEmpty(pTXRB)) {
            Chip_UART_IntDisable(pUART, UART_IER_THREINT);
        }
    }

    /* Handle receive interrupt */
    Chip_UART_RXIntHandlerRB(pUART, pRXRB);

    /* Handle Autobaud interrupts */
    Chip_UART_ABIntHandler(pUART);
}

If you didn't enable the transmit interrupt, you can just handle the receive interrupt.

Please test the receive interrupt directly, whether you also have the receive problem?

If you still have problem, please let me know!


Have a great day,
Kerry

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1,778 Views
rnb
Contributor II

Thank's Kerry,

This solve the problem. Now transmitting and receiving using IRQ.

1,778 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hello customer,

   If your problem is solved, please help to mark the correct answer to close this question.

   If you have the new question, please create the new question post, we will help you to answer it in your new post.

Have a great day,
Kerry

 

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