LPC1768 UART PCLK

[shyamshankar]

Hi,

I am trying out the LPC1768 UART0 to run at baud rates of 1Mbps and more. It seems that to make this work I need to set the PCLK to 100MHz. What is the significance of changing PCLK ? What are the software implications of changing the PCLK to 100MHz?

Also, I actually want to make this work at around 6Mbps. Would that be possible??

Thanks.

[jeremyzhou]

Hi Shyam Shankar,

Thank you for your interest in NXP Semiconductor products and 

the opportunity to serve you.

The PCLK is generated from the CCLK, about the CCLK generation which is illustrated by the Fig 1 and you can learn the more detailed information about it in the Chapter 4: LPC176x/5x Clocking and power control, the LPCOpen library also demonstrates the way to make it in void Board_SetupClocking(void) function.

                                                               Fig   1
Have a great day,
TIC

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