I'm trying to get an understanding of the 4 different set_power mode options in the LPC1518. Per UM10736 (V1.1) page 584:
/* set_power mode options */
#define PWR_DEFAULT 0
#define PWR_CPU_PERFORMANCE 1
#define PWR_EFFICIENCY 2
#define PWR_LOW_CURRENT 3
Section 34.4.2.2 seems to elude to this effecting only the M3 core. The LPCOpen documenation nor the rom_pwr_15xx.h file in the LPCOpen library code is of any help.
I do see about a 1.5 to 2 mA reduction in consumption at 24MHz core speed between PWR_LOW_CURRENT and PWR_DEFAULT. I would like to know what really is being effected. Are any peripherals or bus behaviors effected? Anyone have any experience with these settings? Is there better documentation on this somewhere?
Update: I found out (the hard way) that use of PWR_EFFICIENCY mode / profile appears to impact the IAP Chip_IAP_CopyRamToFlash() function. With PWR_DEFAULT, the operation of that function works. With PWR_EFFICIENCY the operation appears to be successful based on the response code, however the flash is not updated. This is at a system frequency of 24MHz.
From that behavior I surmise that the power profile setting appears to effect the flash block some how.
Hi Nathan,
Please take a look to the following thread:
Best Regards!
Carlos Mendoza
Technical Support Engineer