Hi,
I am trying to set the bit rate of the SSP0 port of the LPC1313FBD48/01 to 1MHz. The system clock is 72MHz, and it is divided by 12 to have the SSP clock as 6MHz. I have checked the CPSDVSR = 2 and SCR = 2, which should give me 1MHz:
Bit frequency = Pclk/(CPSDVSR * (SCR + 1))
However, I get 781.2kHz in place of 1MHz.
What might be going wrong here?
Regards,
Prachi
Solved! Go to Solution.
Hi prachi panse,
Thanks for your reply.
If the system clock is located in the range of 71 to 72 MHz, the observed frequency: 992kHz can be considered correct according to below formula.
Bit frequency = Pclk/(CPSDVSR * (SCR + 1))
Hope it helps.
Have a great day,
TIC
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Hi prachi panse,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I was wondering if you can share the screenshot of values of the corresponding registers under debugging.
Have a great day,
TIC
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Hi,
I have tested with the same settings on another board and see that the bit clock gets set to 992kHz instead of 1MHz. The SSP0 registers are as below:
Please let me know if these values are as expected to achieve 1MHz bit rate.
Thanks and Regards,
Prachi
Hi prachi panse,
Thank for your reply.
It's so weird, to dig the more deeper, can you share the wave of system clock via clkout pin?
Have a great day,
TIC
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Thanks. I have observed the system clock on the CLKOUT pin and it comes to be around 71-72MHz.
Hi prachi panse,
Thanks for your reply.
If the system clock is located in the range of 71 to 72 MHz, the observed frequency: 992kHz can be considered correct according to below formula.
Bit frequency = Pclk/(CPSDVSR * (SCR + 1))
Hope it helps.
Have a great day,
TIC
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------