LPC1313 GPIO interrupt

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 08:20:00 MST 2015
Hi there,

I have a problem with the external interrupt on pin 1.8.

The interrupt should be fire when a negative edge is detect.
I connected a LED on P0.3 and my Oszilloscope. The problem is that not every negative edge toggles the P0.3.
Sometimes 3 or 4 times P0.3 toggle than 5 till 7 times it doesn't work.

Has anyone a idea?
Oh, I use a LPC1313/01

void gpio_Init(void)
{

/* Enable AHB clock to the GPIO domain. */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 16);  /* enable clock for IOCON      */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 6);  /* enable clock for GPIO      */

  // Toggle dir
  LPC_GPIO1->DIR &= ~(1 << 8);//P1.8 Input
  LPC_GPIO0->DIR |= (1<<3); //P0.3 Output

  //Pullup P1.8
  LPC_IOCON->PIO1_8 &= ~((unsigned int) 0x00000018);
  LPC_IOCON->PIO1_8 |= ((unsigned int) 0x00000030);


LPC_GPIO1->IS &= ~(0x1<<8); //sense = Edge
LPC_GPIO1->IBE &= ~(0x1<<8);//single Edge
LPC_GPIO1->IEV &= ~(0x1<<8); //aktive Low
LPC_GPIO1->IE |= (0x1<<8); //interrupt enable
NVIC_SetPriority(EINT1_IRQn,3);
  /* Set up NVIC when I/O pins are configured as external interrupts. */
  NVIC_EnableIRQ(EINT1_IRQn);

}

void PIOINT1_IRQHandler(void)
{
if(LPC_GPIO1->RIS & (0x1<<8))
        {
                if(!y)
        {
      LPC_GPIO0->DATA &= ~0x0008;
         y++;
        }
        else
        {
       LPC_GPIO0->DATA |= 0x0008;
       y=0;
        }
LPC_GPIO1->IC |= (0x1<<8);
__NOP();
__NOP();
        }
}

[lpcware]

Content originally posted in LPCWare by Michael06433 on Wed Jun 24 06:38:46 MST 2015
I found the bug.

On my hardware is an external watchdog. He is triggered over P0.8.

In my testprogram every main-loop.

(LPC_GPIO0->DATA & (1UL<<8))? (LPC_GPIO0->DATA &= ~(1UL<<8)): (LPC_GPIO0->DATA |= (1UL<<8));

The problem seems that the whole port is read and write back. When the irq comes between read and write back the P0.3 will be overwritten.

Is there a way to toggle P0.8 bitwise? Does the LPC support atomic instructions?

I just have read that the LPC13xx doesn't support bit-banding

Any idea?  Disable irq while read modify write?

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Jun 23 13:27:16 MST 2015

---

Quote: TheFallGuy
Select any two items (files, projects, directories) right click and choose Compare -> With each other

---

Keil and LPCXpresso  :quest:

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Tue Jun 23 13:21:14 MST 2015
Select any two items (files, projects, directories) right click and choose Compare -> With each other

[lpcware]

Content originally posted in LPCWare by Michael06433 on Tue Jun 23 13:02:04 MST 2015
It is a mystery. Your code works well by my code isn't.

I believe it has something to do with the startup code or the general header file. I am looking for a good way to compare the two projects.
But it's enough for today.

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Jun 23 08:35:21 MST 2015
It's a simple default LPCXpresso / LPCOpen project...

/*
===============================================================================
 Name        : LPC13_IRQ_DEBOUNCE.c
 Author      : $(author)
 Version     :
 Copyright   : $(copyright)
 Description : main definition
===============================================================================
*/

#include "board.h"
#include cr_section_macros.h

volatile uint32_t counter;

#define OUT_PORT0
#define OUT_PIN3


void gpio_Init(void)
{
 //enable GPIO clock
 Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO);
 //PIO_1.8 input
 Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO1_8, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
 Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, 1, 8);
//PIO_0.3 output
 Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_3, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
 Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, OUT_PORT, OUT_PIN);

 Chip_GPIO_SetPinModeEdge(LPC_GPIO_PORT, 1, (1<<8));
 Chip_GPIO_SetEdgeModeSingle(LPC_GPIO_PORT, 1, (1<<8));
 Chip_GPIO_SetModeLow(LPC_GPIO_PORT, 1, (1<<8));
 Chip_GPIO_ClearInts(LPC_GPIO_PORT, 1, (1<<8));
 Chip_GPIO_EnableInt(LPC_GPIO_PORT, 1, (1<<8));
 NVIC_SetPriority(EINT1_IRQn,3);
 NVIC_EnableIRQ(EINT1_IRQn);
}

void PIOINT1_IRQHandler(void)
{
 int32_t difference = 20000;//2.2ms @ int32_t  & -Og
 Chip_GPIO_SetPinOutHigh(LPC_GPIO_PORT, OUT_PORT, OUT_PIN);
 if(Chip_GPIO_GetRawInts(LPC_GPIO_PORT, 1) & (0x1<<8))
 {
  counter++;
  while(--difference >0);
  Chip_GPIO_ClearInts(LPC_GPIO_PORT, 1, (1<<8));
  __NOP(); __NOP();
 }
 Chip_GPIO_SetPinOutLow(LPC_GPIO_PORT, OUT_PORT, OUT_PIN);
}

int main(void)
{
 SystemCoreClockUpdate();
 Board_Init();
 Board_LED_Set(0, true);
 gpio_Init();
 volatile static int i = 0;
 while(1)
 {
  i++;
 }
 return 0;
}

[lpcware]

Content originally posted in LPCWare by Michael06433 on Tue Jun 23 08:15:22 MST 2015
Yes, you are right. It works.

I try to port your code. I will give feedback in a few minutes.

No way. I doesn't work.

void PIOINT1_IRQHandler(void)
{
int32_t difference = 20000;  //2.2ms @ int32_t  & -Og
LPC_GPIO0->DATA |= 0x0008;
if((LPC_GPIO1->RIS & (0x1<<8)) != 0)
  {
while(--difference > 0);
LPC_GPIO1->IC = (0x1<<8);
__NOP();
__NOP();
}
LPC_GPIO0->DATA &= ~0x0008;
}

Can you send me the sources or the project please?

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Jun 23 07:52:33 MST 2015

---

Quote: Michael06433
No I didn't. Do you think I could be compiler error?

---

I'm not sure. Perhaps you want to flash this axf...

It's a working LPCXpresso version with 2.2ms delay (20000 * 8 cycles)...

#define OUT_PORT0
#define OUT_PIN3

void PIOINT1_IRQHandler(void)
{
 int32_t difference = 20000;  //2.2ms @ int32_t  & -Og
 Chip_GPIO_SetPinOutHigh(LPC_GPIO_PORT, OUT_PORT, OUT_PIN);
 if(Chip_GPIO_GetRawInts(LPC_GPIO_PORT, 1) & (0x1<<8))
 {
  counter++;
  while(--difference >0);
  Chip_GPIO_ClearInts(LPC_GPIO_PORT, 1, (1<<8));
  __NOP(); __NOP();
 }
 Chip_GPIO_SetPinOutLow(LPC_GPIO_PORT, OUT_PORT, OUT_PIN);
}

[lpcware]

Content originally posted in LPCWare by Michael06433 on Tue Jun 23 07:28:12 MST 2015
No I didn't. Do you think I could be compiler error?

          void gpio_Init(void)
     15: { 
    16:  
    17:         /* Enable AHB clock to the GPIO domain. */ 
0x000004A4 B510      PUSH     {r4,lr}
    18:         LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 16);  /* enable clock for IOCON      */ 
0x000004A6 483E      LDR      r0,[pc,#248]  ; @0x000005A0
0x000004A8 6800      LDR      r0,[r0,#0x00]
0x000004AA F4403080  ORR      r0,r0,#0x10000
0x000004AE 493D      LDR      r1,[pc,#244]  ; @0x000005A4
0x000004B0 F8C10080  STR      r0,[r1,#0x80]
    19:         LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 6);  /* enable clock for GPIO      */ 
    20:  
    21:           // Toggle dir 
0x000004B4 4608      MOV      r0,r1
0x000004B6 F8D00080  LDR      r0,[r0,#0x80]
0x000004BA F0400040  ORR      r0,r0,#0x40
0x000004BE F8C10080  STR      r0,[r1,#0x80]
    22:   LPC_GPIO1->DIR &= ~(1 << 8);  //P1.8 Input 
0x000004C2 4839      LDR      r0,[pc,#228]  ; @0x000005A8
0x000004C4 6800      LDR      r0,[r0,#0x00]
0x000004C6 F4207080  BIC      r0,r0,#0x100
0x000004CA 4937      LDR      r1,[pc,#220]  ; @0x000005A8
0x000004CC 6008      STR      r0,[r1,#0x00]
    23:         LPC_GPIO0->DIR |= (1<<3);             //P0.3 Output 
    24:          
0x000004CE 4837      LDR      r0,[pc,#220]  ; @0x000005AC
0x000004D0 6800      LDR      r0,[r0,#0x00]
0x000004D2 F0400008  ORR      r0,r0,#0x08
0x000004D6 4935      LDR      r1,[pc,#212]  ; @0x000005AC
0x000004D8 6008      STR      r0,[r1,#0x00]
    25:         LPC_IOCON->PIO1_8 = ((unsigned int) 0x00000000); 
    26:  
0x000004DA F04F0000  MOV      r0,#0x00
0x000004DE 4934      LDR      r1,[pc,#208]  ; @0x000005B0
0x000004E0 6148      STR      r0,[r1,#0x14]
    27:         LPC_GPIO1->IS &= ~(0x1<<8); //sense = Edge 
0x000004E2 4831      LDR      r0,[pc,#196]  ; @0x000005A8
0x000004E4 6840      LDR      r0,[r0,#0x04]
0x000004E6 F4207080  BIC      r0,r0,#0x100
0x000004EA 492F      LDR      r1,[pc,#188]  ; @0x000005A8
0x000004EC 6048      STR      r0,[r1,#0x04]
    28:         LPC_GPIO1->IBE &= ~(0x1<<8);    //single Edge 
0x000004EE 4608      MOV      r0,r1
0x000004F0 6880      LDR      r0,[r0,#0x08]
0x000004F2 F4207080  BIC      r0,r0,#0x100
0x000004F6 6088      STR      r0,[r1,#0x08]
    29:         LPC_GPIO1->IEV &= ~(0x1<<8); //aktive Low 
0x000004F8 4608      MOV      r0,r1
0x000004FA 68C0      LDR      r0,[r0,#0x0C]
0x000004FC F4207080  BIC      r0,r0,#0x100
0x00000500 60C8      STR      r0,[r1,#0x0C]
    30:         LPC_GPIO1->IE |= (0x1<<8); //interrupt enable 
0x00000502 4608      MOV      r0,r1
0x00000504 6900      LDR      r0,[r0,#0x10]
0x00000506 F4407080  ORR      r0,r0,#0x100
0x0000050A 6108      STR      r0,[r1,#0x10]
    31:         NVIC_SetPriority(EINT1_IRQn,3); 
    32:   /* Set up NVIC when I/O pins are configured as external interrupts. */ 
0x0000050C F04F0037  MOV      r0,#0x37
0x00000510 F04F0103  MOV      r1,#0x03
  1407:   if(IRQn < 0) { 
0x00000514 2800      CMP      r0,#0x00
0x00000516 DA07      BGE      0x00000528
  1408:     SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M  System Interrupts */ 
  1409:   else { 
0x00000518 074A      LSLS     r2,r1,#29
0x0000051A 0E14      LSRS     r4,r2,#24
0x0000051C 4A25      LDR      r2,[pc,#148]  ; @0x000005B4
0x0000051E F000030F  AND      r3,r0,#0x0F
0x00000522 1F1B      SUBS     r3,r3,#4
0x00000524 54D4      STRB     r4,[r2,r3]
0x00000526 E003      B        0x00000530
  1410:     NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff);    }        /* set Priority for device specific Interrupts  */ 
0x00000528 074A      LSLS     r2,r1,#29
0x0000052A 0E13      LSRS     r3,r2,#24
0x0000052C 4A22      LDR      r2,[pc,#136]  ; @0x000005B8
0x0000052E 5413      STRB     r3,[r2,r0]
  1411: } 
0x00000530 BF00      NOP      
    33:   NVIC_EnableIRQ(EINT1_IRQn); 
0x00000532 2037      MOVS     r0,#0x37
  1325:   NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ 
0x00000534 F000021F  AND      r2,r0,#0x1F
0x00000538 2101      MOVS     r1,#0x01
0x0000053A 4091      LSLS     r1,r1,r2
0x0000053C 0942      LSRS     r2,r0,#5
0x0000053E F04F23E0  MOV      r3,#0xE000E000
0x00000542 EB030282  ADD      r2,r3,r2,LSL #2
0x00000546 F8C21100  STR      r1,[r2,#0x100]
  1326: } 

      36: void PIOINT1_IRQHandler(void) 
    37: { 
0x0000054C BD10      POP      {r4,pc}
    38:         if((LPC_GPIO1->RIS & (0x1<<8)) != 0) 
    39:   { 
0x0000054E 4816      LDR      r0,[pc,#88]  ; @0x000005A8
0x00000550 6940      LDR      r0,[r0,#0x14]
0x00000552 F4107F80  TST      r0,#0x100
0x00000556 D022      BEQ      0x0000059E
    40:                 LPC_GPIO1->IE = 0x000; 
0x00000558 2000      MOVS     r0,#0x00
0x0000055A 4913      LDR      r1,[pc,#76]  ; @0x000005A8
0x0000055C 6108      STR      r0,[r1,#0x10]
    41:                 LPC_GPIO0->DATA ^= (1 << 3); 
0x0000055E 4817      LDR      r0,[pc,#92]  ; @0x000005BC
0x00000560 6800      LDR      r0,[r0,#0x00]
0x00000562 F0800008  EOR      r0,r0,#0x08
0x00000566 4915      LDR      r1,[pc,#84]  ; @0x000005BC
0x00000568 6008      STR      r0,[r1,#0x00]
    42:                 while(LPC_GPIO1->RIS & (1<<8)) 
    43:                 { 
0x0000056A E00F      B        0x0000058C
    44:                         LPC_GPIO1->IC = (0x1<<8); 
0x0000056C F44F7080  MOV      r0,#0x100
0x00000570 490D      LDR      r1,[pc,#52]  ; @0x000005A8
0x00000572 61C8      STR      r0,[r1,#0x1C]
    45:                         __NOP(); 
0x00000574 BF00      NOP      
    46:                         __NOP(); 
0x00000576 BF00      NOP      
    47:                         __NOP(); 
0x00000578 BF00      NOP      
    48:                         __NOP(); 
0x0000057A BF00      NOP      
    49:                         __NOP(); 
0x0000057C BF00      NOP      
    50:                         __NOP(); 
0x0000057E BF00      NOP      
    51:                         __NOP(); 
0x00000580 BF00      NOP      
    52:                         __NOP(); 
0x00000582 BF00      NOP      
    53:                         __NOP(); 
0x00000584 BF00      NOP      
    54:                         __NOP(); 
0x00000586 BF00      NOP      
    55:                         __NOP(); 
0x00000588 BF00      NOP      
    56:                         __NOP(); 
    57:  
    58:                 } 
0x0000058A BF00      NOP      
    42:                 while(LPC_GPIO1->RIS & (1<<8)) 
    43:                 { 
    44:                         LPC_GPIO1->IC = (0x1<<8); 
    45:                         __NOP(); 
    46:                         __NOP(); 
    47:                         __NOP(); 
    48:                         __NOP(); 
    49:                         __NOP(); 
    50:                         __NOP(); 
    51:                         __NOP(); 
    52:                         __NOP(); 
    53:                         __NOP(); 
    54:                         __NOP(); 
    55:                         __NOP(); 
    56:                         __NOP(); 
    57:  
    58:                 } 
0x0000058C 4806      LDR      r0,[pc,#24]  ; @0x000005A8
0x0000058E 6940      LDR      r0,[r0,#0x14]
0x00000590 F4107F80  TST      r0,#0x100
0x00000594 D1EA      BNE      0x0000056C
    59:                 LPC_GPIO1->IE = 0x100; 
    60:         } 
0x00000596 F44F7080  MOV      r0,#0x100
0x0000059A 4903      LDR      r1,[pc,#12]  ; @0x000005A8
0x0000059C 6108      STR      r0,[r1,#0x10]
    61: }  

[lpcware]

Content originally posted in LPCWare by R2D2 on Tue Jun 23 06:31:56 MST 2015
Did you look at the disassembly?

[lpcware]

Content originally posted in LPCWare by Michael06433 on Tue Jun 23 06:08:30 MST 2015
Hi there,

I modified my code a little bit just for test.
Has someone a explaination for the waveform in the picture (CH2 = reed switch, CH1 = P0.3) ? The interrupt should fire an exception by falling edge. In the interrupt the port P0.3 should toggle. If you can see P0.3 toggles at the first falling edge. WHY is the port toggling again after 1us?????
Is the resolution of my scope too less? I can't understand that.

void gpio_Init(void)
{

/* Enable AHB clock to the GPIO domain. */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 16);  /* enable clock for IOCON      */
LPC_SYSCON->SYSAHBCLKCTRL |= (0x1UL << 6);  /* enable clock for GPIO      */

  // Toggle dir
        LPC_GPIO1->DIR &= ~(1 << 8);//P1.8 Input
LPC_GPIO0->DIR |= (1<<3); //P0.3 Output

LPC_IOCON->PIO1_8 = ((unsigned int) 0x00000000); //no pullup, no hysteresis, function PIO

LPC_GPIO1->IS &= ~(0x1<<8); //sense = Edge
LPC_GPIO1->IBE &= ~(0x1<<8);//single Edge
LPC_GPIO1->IEV &= ~(0x1<<8); //aktive Low
LPC_GPIO1->IE |= (0x1<<8); //interrupt enable
NVIC_SetPriority(EINT1_IRQn,3);
       /* Set up NVIC when I/O pins are configured as external interrupts. */
      NVIC_EnableIRQ(EINT1_IRQn);
}


void PIOINT1_IRQHandler(void)
{
if((LPC_GPIO1->RIS & (0x1<<8)) != 0)
        {
LPC_GPIO1->IE = 0x000;     //disable isr
LPC_GPIO0->DATA ^= (1 << 3);  //toggle LED
while(LPC_GPIO1->RIS & (1<<8))
{
LPC_GPIO1->IC = (0x1<<8);  //clear isr
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();

}
LPC_GPIO1->IE = 0x100; // enable isr
}
}

[lpcware]

Content originally posted in LPCWare by starblue on Tue Jun 23 00:58:10 MST 2015
Do you really need to use an interrupt? It would be much easier and safer to poll the signal periodically, say every 1 or 10ms.

[lpcware]

Content originally posted in LPCWare by R2D2 on Mon Jun 22 23:01:37 MST 2015

---

Quote: Michael06433
Yes you are right, but it is only for a test. Can you explain the short pulse in the image in spite of the delay in the isr?

---

Obviously the interrupt isn't cleared...

I'm not sure if reading WO register IC is causing this behavior, or the usage of matched interrupts...

A similar ISR (LPCXpresso / LPCOpen) is working here without problems 

void PIOINT1_IRQHandler(void)
{
 int difference= 20000;
 if(Chip_GPIO_GetRawInts(LPC_GPIO_PORT, 1) & (0x1<<8))
 {
  //toggle
  Chip_GPIO_SetPinToggle(LPC_GPIO_PORT, 0, 6);
  //wait
  while(--difference > 0);
  //clear interrupt
  Chip_GPIO_ClearInts(LPC_GPIO_PORT, 1, (1<<8));
  __NOP(); __NOP();
 }
}

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 21:42:36 MST 2015
Yes you are right, but it is only for a test. Can you explain the short pulse in the image in spite of the delay in the isr?

[lpcware]

Content originally posted in LPCWare by R2D2 on Mon Jun 22 12:44:04 MST 2015
A delay within an ISR, my eyes are hurting  

difference = 20000;
while(--difference > 0);

Please use a simple match timer...

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 12:08:26 MST 2015
Okay I used to do some software debouncing but without success.

This is the way I debounced the interrupt:

void PIOINT1_IRQHandler(void)
{
int difference = 0;
if(LPC_GPIO1->MIS & (0x1<<8))
  {
difference = 20000;
while(--difference > 0);
if(y == 0)
{
LPC_GPIO0->DATA &= ~0x0008;
y++;
}
else
{
LPC_GPIO0->DATA |= 0x0008;
y=0;
}
while(LPC_GPIO1->MIS & (1<<8))
{
LPC_GPIO1->IC |= (0x1<<8);
__NOP();
__NOP();
}
}
}

Please have a look to the attached image. CH2 is the reed switch. CH1 is the LED P0.3. How is it possible that the pin goes low and high immediately?
The time between low and high is about 4us.

[lpcware]

Content originally posted in LPCWare by R2D2 on Mon Jun 22 09:31:23 MST 2015

---

Quote: Michael06433
Are there any filter options at the LPC1313?

---

No, add a RC Filter and / or do some software debouncing (like a simple delay...).

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 09:16:11 MST 2015
It seems like a chatter problem. Have a look to the attached image.

Are there any filter options at the LPC1313?

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 09:11:10 MST 2015
I found out that the output P0.3 sometimes was set and reset in a very short time. It looks like that the interrupt routine is run twice.

At the input P1.8 is a reed-relais with a pull-up resistor.

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 09:05:19 MST 2015
You will find the project as a ZIP-file in the attachment.

[lpcware]

Content originally posted in LPCWare by Michael06433 on Mon Jun 22 08:53:10 MST 2015
Hi,
I have attached an image from the scope. CH2 is the input (P1.8) and CH1 is the output (P0.3)
As you can see the first negative edge does not force a change of the state of P0.3. The 2nd and 3rd edge works well.

I will put the project to the next post.