Finally got SPI slave mode 3 to work without pulsing SSEL high for each byte with LPC1114/301... So it seems mode 3 works after all.
Thanks for the reply.
I'm doing that but something is wrong. With this, I can send 3 ADC from slave to the master, and master receives ok. But now I'm trying to send one more ADC (4 ADCs by now, but at the end of all, I will have to send-receive 6 ADCs) and my master receives the 4 ADCs messed up.
My vTaskPFC from the master is done by a switch case with 3 cases (1 for each ADC) which have a receive_Word (16bits) function. In my receive function I have:
1. Send 0xffff
2. Send address
3. Receive data from slave
4. Receive crc from slave
**************************************
In my ProcessFrame function from slave, I've got 4 Length where I do:
1. return_value = 0x0000
2. return_value = adc valor
3. return_value = crc
4. return_value = 0x0000
So my MISO looks 0, 0, DATA, CRC, and my MOSI looks OP_R/W, address, FF, FF
This works for 3 ADCs, but not for 4.
Here there're my SPI Irqhandler file
Note that my task 'vTaskPFC' from the master is done each 1ms.
Thank you!!!
If you are using SPI mode 0, then the SSEL must be pulsed high between each data word. The User's Manual (paragraph 14.7.2.2) states:
"in the case of continuous back-to-back transmissions, the SSEL signal must be pulsed HIGH between each data word transfer. This is because the slave select pin freezes the data in its serial peripheral register and does not allow it to be altered if the CPHA bit is logic zero. Therefore the master device must raise the SSEL pin of the slave device between each data transfer to enable the serial peripheral data write. On completion of the continuous transfer, the SSEL pin is returned to its idle state one SCK period after the last bit has been captured."
Hopefully this helps.