#define CLOCK_SETUP 1 #define SYSOSCCTRL_Val 0x0 // Reset: 0x000 #define WDTOSCCTRL_Val 0x0 // Reset: 0x000 #define SYSPLLCTRL_Val 0x0 // Reset: 0x000 #define SYSPLLCLKSEL_Val 0x0 // Reset: 0x000 #define MAINCLKSEL_Val 0x0 // Reset: 0x000 #define SYSAHBCLKDIV_Val 0x1 // Reset: 0x001 |
int main(void) {
SystemCoreClockUpdate();
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO);
LPC_IOCON->PIO0[1]=0 | (1<<7);
//put all port 0 pin in output except GPIO0_1 ISP pin with external pull up for ISP programmer
LPC_GPIO->DIR[0] = 0xFFFFFF & ~(1<<1);
//put all output LOW (no pin connected to load)
LPC_GPIO->PIN[0] = 0;
//put all port 1 pin in output
LPC_GPIO->DIR[1] = 0xFFFFFFFF; //(no pin connected to load for the test)
//put all output LOW
LPC_GPIO->PIN[1] = 0;
//UM10518 manual page 40
LPC_WWDT->MOD=0; //to be sure lock bit 5 in the WWDT MOD register is not set.
LPC_PMU->PCON = (1<<11);//clear DPDFLAG if set
LPC_PMU->PCON |= (1<<8);//clear deep sleep flag
LPC_PMU->PCON = 2;//power down config
// power down configuration
LPC_SYSCTL->PDSLEEPCFG = ( 0x37 // reserved bit
| (0x1FF << 7)// reserved bit : see http://docs.lpcware.com/lpc800um/RegisterMaps/syscon/r-PDSLEEPCFG.html
| SYSCTL_DEEPSLP_BOD_PD/* BOD power-down control in Deep-sleep mode, powered down */
| SYSCTL_DEEPSLP_WDTOSC_PD /* Watchdog oscillator power control in Deep-sleep, powered down */
);
// peripheral power down
LPC_SYSCTL->PDRUNCFG= (0xED00// reserved bit
//| SYSCTL_POWERDOWN_IRCOUT_PD /* IRC oscillator output power down */
//| SYSCTL_POWERDOWN_IRC_PD /* IRC oscillator not power-down */
//| SYSCTL_POWERDOWN_FLASH_PD /* Flash not power down */
| SYSCTL_POWERDOWN_BOD_PD /* BOD power down */
| SYSCTL_POWERDOWN_ADC_PD /* ADC power down */
| SYSCTL_POWERDOWN_SYSOSC_PD /* System oscillator power down */
| SYSCTL_POWERDOWN_WDTOSC_PD /* Watchdog oscillator power down */
| SYSCTL_POWERDOWN_SYSPLL_PD /* System PLL power down */
);
LPC_SYSCTL->PDWAKECFG= ( 0xED00// reserved bit
//| SYSCTL_SLPWAKE_IRCOUT_PD /* IRC oscillator output wake-up configuration */
//| SYSCTL_SLPWAKE_IRC_PD /* IRC oscillator power-down wake-up configuration */
//| SYSCTL_SLPWAKE_FLASH_PD /* Flash wake-up configuration */
| SYSCTL_SLPWAKE_BOD_PD /* BOD wake-up configuration */
| SYSCTL_SLPWAKE_ADC_PD /* ADC wake-up configuration */
| SYSCTL_SLPWAKE_SYSOSC_PD /* System oscillator wake-up configuration */
| SYSCTL_SLPWAKE_WDTOSC_PD /* Watchdog oscillator wake-up configuration */
| SYSCTL_SLPWAKE_SYSPLL_PD /* System PLL wake-up configuration */
);
// Enter sleep mode
SCB->SCR |= (1 << 2);//SLEEPDEEP = 1 in system control register
__WFI(); //will never wake up
while(1);
}
|
Original Attachment has been moved to: testLowPower.zip
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO); Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); LPC_IOCON->PIO0[1]=0 | (1<<7); //put all port 0 pin in output except GPIO0_1 ISP pin with external pull up for ISP programmer LPC_GPIO->DIR[0] = 0xFFFFFF & ~(1<<1); //put all output LOW (no pin connected to load) LPC_GPIO->PIN[0] = 0; //put all port 1 pin in output LPC_GPIO->DIR[1] = 0xFFFFFFFF; //(no pin connected to load for the test) //put all output LOW LPC_GPIO->PIN[1] = 0; |
const uint32_t ionum0[24]={
255,//1 | (1<<7),//reset function
0 | (1<<7),//PIO0_1
0 | (1<<7),//PIO0_2
0 | (1<<7),//PIO0_3
0 | (1<<8),//PIO0_4
0 | (1<<8),//PIO0_5
0 | (1<<7),//PIO0_6
0 | (1<<7),//PIO0_7
0 | (1<<7),//PIO0_8
0 | (1<<7),//PIO0_9
255, //1 | (1<<7),//PIO0_10 SWCLK function
1 | (1<<7),//PIO0_11
1 | (1<<7),//PIO0_12
1 | (1<<7),//PIO0_13
1 | (1<<7),//PIO0_14
255,//1 | (1<<7),//PIO0_15 SWDIO function
0 | (1<<7),//PIO0_16
0 | (1<<7),//PIO0_17
0 | (1<<7),//PIO0_18
0 | (1<<7),//PIO0_19
0 | (1<<7),//PIO0_20
0 | (1<<7),//PIO0_21
0 | (1<<7),//PIO0_22
0 | (1<<7),//PIO0_23
};
const uint32_t ionum1[32]={
0 | (1<<7),//PIO1_0
0 | (1<<7),//PIO1_1
0 | (1<<7),//PIO1_2
0 | (1<<7),//PIO1_3
0 | (1<<7),//PIO1_4
0 | (1<<7),//PIO1_5
0 | (1<<7),//PIO1_6
0 | (1<<7),//PIO1_7
0 | (1<<7),//PIO1_8
0 | (1<<7),//PIO1_9
0 | (1<<7),//PIO1_10
0 | (1<<7),//PIO1_11
0 | (1<<7),//PIO1_12
0 | (1<<7),//PIO1_13
0 | (1<<7),//PIO1_14
0 | (1<<7),//PIO1_15
0 | (1<<7),//PIO1_16
0 | (1<<7),//PIO1_17
0 | (1<<7),//PIO1_18
0 | (1<<7),//PIO1_19
0 | (1<<7),//PIO1_20
0 | (1<<7),//PIO1_21
0 | (1<<7),//PIO1_22
0 | (1<<7),//PIO1_23
0 | (1<<7),//PIO1_24
0 | (1<<7),//PIO1_25
0 | (1<<7),//PIO1_26
0 | (1<<7),//PIO1_27
0 | (1<<7),//PIO1_28
0 | (1<<7),//PIO1_29
0 | (1<<7),//PIO1_30
0 | (1<<7),//PIO1_31
};
void io_numInit(uint32_t port0, uint32_t port1)
{
uint32_t pin;
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
//put all port 0 pin in GPIO function except reset pin. All pin with pull-up disabled
for(pin=0;pin<24;pin++)
{
if(ionum0[pin]!=255) LPC_IOCON->PIO0[pin] = ionum0[pin];
}
//put all port 0 pin in output except GPIO0_17, GPIO0_23, GPIO0_1, GPIO0_0,
LPC_GPIO->DIR[0] = 0xFFFFFF & ~port0;
//put all output LOW
LPC_GPIO->PIN[0] = 0;
//put all port 1 pin in GPIO function, output LOW, All pin with pull-up disabled
for(pin=0;pin<32;pin++)
{
if(ionum1[pin]!=255) LPC_IOCON->PIO1[pin] = ionum1[pin];
}
LPC_GPIO->DIR[1] = 0xFFFFFFFF & ~port1;
//put all output LOW
LPC_GPIO->PIN[1] = 0;
}
|
io_numInit((1<<1),0);//all in output, except ISP pin |
io_numInit((1<<1),0); Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_IOCON); Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GPIO); Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_PINT); |