I'm using the LPC11C24 and it has been successful on SSP0. Now I want to use SSP1 is well. I've set the PinMux to:
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO2_2, (IOCON_FUNC1 | IOCON_MODE_INACT)); | // MISO1 |
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO2_3, (IOCON_FUNC1 | IOCON_MODE_INACT)); | // MOSI1 |
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO2_0, (IOCON_FUNC1 | IOCON_MODE_INACT)); | // SSEL1 |
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO2_1, (IOCON_FUNC1 | IOCON_MODE_INACT)); | // SCK1 |
#define LPC_SSP LPC_SSP1
Using the same code for the SSP0 and with a scope on SSEL1 and SCK1 I can't see any signals.
Is there anything else that need to be configured for use with SSP1?
Adding | 0xC0 didn't help. Checking SYSCON.PRESETCTRL.2 is not easy as everything is abstracted, I'm using the npx_lpcxpresso_11c24_periph_ssp example.
I just changed the #define LPC_SSP LPC_SSP0 to #define LPC_SSP LPC_SSP1
and changed the pinmux setting.
I have found this SSP1 example to be working. It uses these settings
//SET UP THE SPI
LPC_IOCON->PIO2_3 = (LPC_IOCON->PIO2_3 & ~(0x3)) | 0x2; //set PIO2_3 up as MOSI function (sec. 7.4.34)
LPC_IOCON->PIO2_2 = (LPC_IOCON->PIO2_2 & ~(0x3)) | 0x2; //set PIO2_2 up as MISO function (sec. 7.4.22)
LPC_IOCON->PIO2_0 = (LPC_IOCON->PIO2_0 & ~(0x3)) | 0x2; //set PIO2_0 up as SSEL function (sec. 7.4.2)
LPC_IOCON->PIO2_1 = (LPC_IOCON->PIO2_1 & ~(0x3)) | 0x2; //set PIO2_1 up as SCK function (sec. 7.4.9)
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<18); //enable clock to SPI1 block (sec. 3.5.14)
LPC_SYSCON->SSP1CLKDIV |= 0x2F; //enable SPI clk by writing non-zero clk divisor (sec. 3.5.17)
LPC_SYSCON->PRESETCTRL |= 0x04; //clear SPI reset, SPI held in reset by default (sec. 3.5.2)
LPC_SSP1->CR0 |= 0x07; //set for 8 bit transfer (sec. 14.6.1)
LPC_SSP1->CR1 |= 0x02; //enable SPI (sec. 14.6.2)
The trouble is, this project is based on the CMSIS and I can't put the above code in the lpcexpresso project. It won't compile.
Can someone please try the npx_lpcxpresso_11c24_periph_ssp example on SSP1.
Double-check that the SSP1 is not in reset mode (SYSCON.PRESETCTRL.2)
Make sure the clock divider for SSP1 is set to a non-zero value in SYSCON.SSP1CLKDIV
Try adding 0xC0 to the mode bits (as in (IOCON_FUNC1 | IOCON_MODE_INACT | 0xC0) )