LPC1114: UART flow control/RTS problem after deep sleep

[brampeeters]

Hi,

I am suspecting there is a HW bug with the flow control mechanism in the LPC1114 uart peripheral after going in and out of deep sleep.

Before going into deep sleep i disable the uart and configure the pins as GPIO input pins (to make sure none of them are high, because the chip at the other of the uart connection is powered off).

Then after deep sleep I reconfigure all pins in uart mode and follow the steps Chip_UART_Init / Chip_UART_SetBaud / Chip_UART_ConfigData /  Chip_UART_SetModemControl ( with auto RTS/CTS ) / Chip_UART_SetupFIFOS (with a reset of RX and TX fifo) / Chip_UART_TXEnable / Chip_UART_IntEnable.

After this the RTS line sometimes is deasserted / pin 30 high even though there are 0 bytes in the receive buffer.

This is also reflected in the registers if i dump them periodically:

[UART] LPC_SYSCTL->SYSAHBCLKCTRL: 0x1B65F
[UART] LPC_SYSCTL->PDRUNCFG     : 0xED60
[UART] LPC_IOCON->REG[IOCON_PIO1_5] : 0x2
[UART] LPC_USART->FCR:                0xC1
[UART] LPC_USART->MCR:                0xC0
[UART] LPC_USART->MSR:                0x11
[UART] LPC_USART->LSR:                0x60

MCR.RTSEN is on,  LSR.RDR = 0 so the RBR is empty, but MCR.RTSC is 0 (and pin 30 is high) so it is indicating that it is not ready for new characters....

Unless I am missing something, I think this is suppose to be impossible on good functioning HW ?

If I short pin 30 to ground for a moment the it stays low, everything works again (starts receiving chars) and the readout becomes

[UART] LPC_SYSCTL->SYSAHBCLKCTRL: 0x1B65F
[UART] LPC_SYSCTL->PDRUNCFG     : 0xED60
[UART] LPC_IOCON->REG[IOCON_PIO1_5] : 0x2
[UART] LPC_USART->FCR:                0xC1
[UART] LPC_USART->MCR:                0xC2
[UART] LPC_USART->MSR:                0x11
[UART] LPC_USART->LSR:                0x60

At initial startup up it always works correctly.

If i go through the entire routine to set the uart pins as GPIO's and then back as UART without going to deep sleep it also seems to always work.

But if I include the deep sleep in between then sometimes i end up in the situation above.

Any suggestions ?

[jeremyzhou]

Hi  Bram Peeters ,

Thank you for your interest in NXP Semiconductor products and 

the opportunity to serve you.

I was wondering if you can share a compile-able demo which enable me to replicate this issue on my site, then I can report it.

TIC

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[liufeng123]

the same problem  with me