Hello,
I want to use an timer interrupt (timer2) together with center aligned pmw on mcpwm. Therefore I set a value to the limit register to both channels of the mcpwm and set 2 times the value to the matchregister of the timer2 and enable the reset on match flag for timer2. I would expect that the timing difference between the edge of the mcpwm and the edge of the gpio that gets toggled in the timer2 irq handler will stay the same. However the timing offset between the edge of mcpwm and the edge of the gpio that gets toggled because of the timer2 match interrupt varies over time. Do you have an explanaition of this behaviour?
kind regards
Florian
Hi,
I suppose that you use LPC17xx, there are Timer module and MCPWM module, but there is not a synchronizing mechanism between the Timer and MCPWM.
Even if you set up the Timer and MCPWM with the same period, because of the starting point difference between the Timer and MCPWM, there is delay for the timing.
Furthermore, assume that both Timer and MCPWM are synchronized, you have the Timer to fire an interrupt, in the ISR of Timer, you toggle a GPIO pin, you hope that the GPIO toggling and PWM timing are synchronized. Even if that the firing interrupt event of Timer and MCPWM timing can be synchronized, but it is indeterminate for the core to execute the ISR of timer, it is dependent on the load of core, and the exact code when the Timer interrupt happens.
In conclusion, it is normal that the timing difference between the edge of the mcpwm and the edge of the gpio that gets toggled in the timer2 irq handler varies for each cycle.
If you need more PWM channels which are required to be synchronized, I suggest you consider i.mxrt10xx,DSC, LPC553x....,they have two FlexPWM modules, which can provide at least 16 PWM channels, all of the 16 PWM channels can be synchronized.
Hope it can help you
BR
XiangJun Rong