Input Leakage current

[p_verheij]

Data sheet mentions LOW level input current ,high level input current off-state output current and input leakage current.All with a number of footnotes.

Now the HIGH and LOW level input currents are in the nA range , while the input leakage current is in the uA range.

I just wanted to know the sum of leakage currents in the case of using a pin as ADC input.

I've had several of my colleagues to read this particular section of the data sheet and none of them even gets a remote clue of what this all is supposed to mean.

This data was found in the LPC84x data sheet Ver 1.9 in table 15 on page 54-56 , but it also appeared in the LPC824 datasheet as I recall.

[xiangjun_rong]

Hi, Peter,

I refer to only LPC82x.pdf here.

The IiL is tested with the condition that the pin is an input pin, the input voltage is 0V, the on-chip pull-up resistor is disabled, the input current is 0.5nA generally. Note the spec is valid for general pins.

For the following Fig, the Ili(input leakage current) spec is only valid for I2C bus pins(PIO0_10 and PIO0_11 pins), which are open-drain pins.

Hope it can help you

BR

Xiangjun Rong

[p_verheij]

Ahhh, i see it now! this 2--4uA leakage current only applies to the I2C lines !

But still remains the issue that every pin id bi-directional, so when you use it as an input , the output is in HI-z state , so Ioz apllies as well as either Iil or Iih

[xiangjun_rong]

Hi, Peter,

You are right,the pin can be set up as input and output, when the pin is set up in input mode, the output gate is set up in tri-state(High impedance mode), the current is called Ioz. But the Ioz concept is different from the Iil and Iih.

BR

XiangJun Rong