Initial pull-up state on LPC804

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Initial pull-up state on LPC804

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xarowubas
Contributor III

The LPC804 datasheet (rev. 1.4, page 12) lists PIO0_10 and PIO0_11 as having a passive reset state whereas the remaining GPIO pins have the internal pull-ups enabled by default. The reference manual (UM11065, rev 1.3, page 103-104) lists the reset states of PIO0_10/PIO0_11 as also having the pull- ups enabled.

Measuring the pin immediately after the ROM start-up sequence or inspecting the IOCON configuration appears to confirm that the latter behavior.

Which document is correct? Are any GPIO I/O pins with a high-Z reset state available on the LPC804M101JHI33E?

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi Xaro,

This problem was reported and confirmed as a document defect by R&D.

The Datasheet information is typo.  Those two GPIO pin are all input / pull-up in reset status.

Our document team will fix it in next release.

Thanks for bringing the problem to our attention.


Have a great day,
Jun Zhang

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