How to run code in SDRAM on lpc1788

[lpcware]

Content originally posted in LPCWare by allanzyx on Fri Jul 04 08:06:40 MST 2014
here is detail informaion about my issue,
I use on lpc1788. fist of all, chip boot from internel flash, do some initialization work, setup MPU, then copy a binary file from usb disk to SDRAM, jump the this binary file the secord dword address to run this binary file.

Here is code,

void run_app(unsigned long app_addr)
{
  uint32_t initial_sp = *(uint32_t*)(app_addr + 0);
  user_code_pointer_type user_code_entry = (user_code_pointer_type)(*(uint32_t*)(app_addr + 4));
 
  NVIC_DeInit();
  NVIC_SetVTOR(app_addr);
  __set_MSP (initial_sp);
  (user_code_entry)();
}

MPU setup code:

/* Access permission definitions */
#define MPU_NO_ACCESS                           0x00
#define MPU_PRIVILEGED_ACESS_USER_NO_ACCESS     0x01
#define MPU_PRIVILEGED_RW_USER_READ_ONLY        0x02
#define MPU_FULL_ACCESS                         0x03
#define MPU_UNPREDICTABLE                       0x04
#define MPU_PRIVILEGED_READ_ONLY_USER_NO_ACCESS 0x05
#define MPU_READ_ONLY                           0x06

/* RASR bit definitions */
#define MPU_RASR_REGION_SIZE(n)         ((uint32_t)(n<<1))
#define MPU_RASR_ACCESS_PERMISSION(n)   ((uint32_t)(n<<24))
#define MPU_REGION_ENABLE               ((uint32_t)(1<<0))


void board_mpu_init(void)
{
    /* - Region 0: 0x00000000 - 0x0007FFFF --- on-chip non-volatile memory
     *      + Size: 512kB
     *      + Acess permission: full access
     */
    MPU->RNR  = 0;//indicate MPU region 0
    MPU->RBAR = 0x00000000; // update the base address for the region 0
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)     //full access
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_512KB)    //512Kb size
                |MPU_REGION_ENABLE;                             //region enable

    /* - Region 1: 0x10000000 - 0x1000FFFF --- on-chip SRAM
     *      + Size: 64kB
     *      + Access permission: full access
     */
    MPU->RNR = 1;
    MPU->RBAR = 0x10000000; // update the base address for the region 1
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_64KB)
                |MPU_REGION_ENABLE;

     /* - Region 2: 0x40000000 - 0x400FFFFF --- APB peripheral
     *      + Size: 1MB
     *      + Access permission: full access
     */
    MPU->RNR = 2;
    MPU->RBAR = 0x40000000; // update the base address for the region 2
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
                |MPU_REGION_ENABLE;

     /* - Region 3: 0x20080000 - 0x200BFFFF --- AHB peripheral
     *      + Size: 256KB
     *      + AP=b011: full access
     */
    MPU->RNR = 3;
    MPU->RBAR = 0x20080000; // update the base address for the region 3
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_256KB)
                |MPU_REGION_ENABLE;

     /* - Region 4: 0xE0000000 - 0xE00FFFFF --- System control
     *      + Size: 1MB
     *      + Access permission: full access
     */
    MPU->RNR = 4;
    MPU->RBAR = 0xE0000000; // update the base address for the region 4
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
                |MPU_REGION_ENABLE;

     /* - Region 5:0x20000000 - 0x20007FFF --- on chip SRAM
     *      + Size: 32kB
     *      + Access permission: full access
     */
    MPU->RNR = 5;
    MPU->RBAR = 0x20000000; // update the base address for the region 5
    MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
                |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32KB)
                |MPU_REGION_ENABLE;

    /* - Region 6:0xA0000000 - 0xA1000000 --- NorFlash
    *      + Size: 16MB
    *      + Access permission: full access
    */
   MPU->RNR = 6;
   MPU->RBAR = 0xA0000000; // update the base address for the region 5
   MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
               |MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_16MB)
               |MPU_REGION_ENABLE;

   SCB->SHCSR |=(1<<16);   //Enable Memory management fault
   MPU->CTRL =(1<<0);      //Enable the MPU
}

could you please let me know, is there any errors in this code, or I should adjust my binary compiler option?
Do you have any example code I can use?
I use MDK 4.7.
Thanks a lot.,
Allan

[lpcware]

Content originally posted in LPCWare by allanzyx on Thu Jul 24 09:17:21 MST 2014
Hi, I've tried for couple of weeks, it still can't work,
I do cpoy the VETOR table from sdram to IRAM1. and I disable the MPU before I setup the MPU.
what shoud I check and what I missed in this code.
could you please help .
Allan

[lpcware]

Content originally posted in LPCWare by allanzyx on Wed Jul 09 06:44:17 MST 2014
appreciate.

[lpcware]

Content originally posted in LPCWare by wmues on Sat Jul 05 02:24:32 MST 2014
Allan,

I have posted my code here:

http://www.lpcware.com/content/forum/lpc1788-sdram-timing-problem#comment-1790

One thing that WILL not work is:

NVIC_SetVTOR(app_addr);

Please copy your interrupt table into internal RAM and set the VTOR address to internal RAM.
External RAM addresses are not valid for VTOR. Read the manual!

Disabling interrupts is a good thing.

In your MPU setup, you must disable the MPU before you change the MPU registers.
MPU->CTRL = 0x00;
__ISB();
....MPU programming
MPU->CTRL = 0x01;
__DSB(); // Data Sync
__ISB(); // instruction memory barrier

regards
Wolfgang