Content originally posted in LPCWare by agoodman on Sun Oct 26 07:12:54 MST 2014
My code is downloaded to on-chip flash with MDK4.72 .
This is my process:
1.initialize SDRAM
2.Copy code to SDRAM
3.configurate MPU
4.change PC with an function
However,PC won't change and CPU won't go to SDRAM to run codes.
Here are the codes:
void copy_to_SDRAM(void)
{
void (*call_app)(void) = (void (*)(void))0xA00002CC; // pointer to user codes
memcpy((void *)0xA0000000,(void *)0x00000000,0x0007FFFF); //copy (512K) on-chip flash's codes to SDRAM
__set_MSP(0xA00002C8);
call_app(); //jump to SDRAM to run
}
/*********************************************MPU setting *********************************************************/
/* Region size definitions */
#define MPU_REGION_SIZE_32KB 0x0E
#define MPU_REGION_SIZE_64KB 0x0F
#define MPU_REGION_SIZE_512KB 0x12
#define MPU_REGION_SIZE_32MB 0x18
#define MPU_REGION_SIZE_128MB 0x1A
#define MPU_REGION_SIZE_1GB 0x1D
#define MPU_REGION_SIZE_2GB 0x1E
#define MPU_REGION_SIZE_4GB 0x1F
/* Access permission definitions */
#define MPU_FULL_ACCESS 0x03
/* RASR bit definitions */
#define MPU_RASR_REGION_SIZE(n) ((uint32_t)(n<<1))
#define MPU_RASR_ACCESS_PERMISSION(n) ((uint32_t)(n<<24))
#define MPU_REGION_ENABLE ((uint32_t)(1<<0))
void board_mpu_init(void)
{
MPU->CTRL = 0x00;
__ISB();
/* - Region 0: 0x00000000 - 0x0007FFFF --- on-chip non-volatile memory
* + Size: 512kB
* + Acess permission: full access
*/
MPU->RNR = 0;//indicate MPU region 0
MPU->RBAR = 0x00000000; // update the base address for the region 0
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS) //full access
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_512KB) //512Kb size
|MPU_REGION_ENABLE; //region enable
/* - Region 1: 0x10000000 - 0x1000FFFF --- on-chip SRAM
* + Size: 64kB
* + Access permission: full access
*/
MPU->RNR = 1;
MPU->RBAR = 0x10000000; // update the base address for the region 1
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_64KB)
|MPU_REGION_ENABLE;
/* - Region 2: 0x40000000 - 0x400FFFFF --- APB peripheral
* + Size: 1MB
* + Access permission: full access
*/
MPU->RNR = 2;
MPU->RBAR = 0x40000000; // update the base address for the region 2
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
|MPU_REGION_ENABLE;
/* - Region 3: 0x20080000 - 0x200BFFFF --- AHB peripheral
* + Size: 256KB
* + AP=b011: full access
*/
MPU->RNR = 3;
MPU->RBAR = 0x20080000; // update the base address for the region 3
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_256KB)
|MPU_REGION_ENABLE;
/* - Region 4: 0xE0000000 - 0xE00FFFFF --- System control
* + Size: 1MB
* + Access permission: full access
*/
MPU->RNR = 4;
MPU->RBAR = 0xE0000000; // update the base address for the region 4
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_1MB)
|MPU_REGION_ENABLE;
/* - Region 5:0x20000000 - 0x20007FFF --- on chip SRAM
* + Size: 32kB
* + Access permission: full access
*/
MPU->RNR = 5;
MPU->RBAR = 0x20000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32KB)
|MPU_REGION_ENABLE;
/* - Region 6:0x80000000 - 0x87FFFFFF --- NandFlash
* + Size: 128MB
* + Access permission: full access
*/
MPU->RNR = 6;
MPU->RBAR = 0x80000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_128MB)
|MPU_REGION_ENABLE;
/* - Region 7:0xA0000000 - 0xA1FFFFFF --- Ext SDRAM
* + Size: 32MB
* + Access permission: full access
*/
MPU->RNR = 7;
MPU->RBAR = 0xA0000000; // update the base address for the region 5
MPU->RASR = MPU_RASR_ACCESS_PERMISSION(MPU_FULL_ACCESS)
|MPU_RASR_REGION_SIZE(MPU_REGION_SIZE_32MB)
|MPU_REGION_ENABLE;
MPU->CTRL =(1<<0); //Enable the MPU
__DSB();
__ISB();
}