How do i adjust the output voltage level of GPIO pins?

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How do i adjust the output voltage level of GPIO pins?

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nicolasdarmadja on Wed Jan 28 01:18:49 MST 2015
As the title suggest, is it possible to adjust the output voltage level of GPIO pins?
Thanks in advance.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Thu Mar 05 02:06:27 MST 2015
LPCOpen:

http://www.lpcware.com/content/nxpfile/lpcopen-software-development-platform-lpc5410x-packages
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lpcware
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Content originally posted in LPCWare by nicolasdarmadja on Thu Mar 05 01:57:30 MST 2015
Is there any sample SPI code that I can run with OM13077? Thank you.
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lpcware
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Content originally posted in LPCWare by nicolasdarmadja on Thu Mar 05 00:52:47 MST 2015
So, just to clarify, if the pins are configured as pull-up/pull-down, the SPI pins would swing at VDD level, which defaults to 3.3V in the OM13077 board. Is that correct? Thanks for the reply. I am totally new in MCU programming.
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lpcware
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Content originally posted in LPCWare by xianghuiwang on Wed Mar 04 23:20:44 MST 2015
If the pins are configured as none open drain, the SPI pins swing at VDD level.
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lpcware
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Content originally posted in LPCWare by nicolasdarmadja on Wed Mar 04 22:30:40 MST 2015
I was planning to use the SPI in this board and was wondering whether the voltage level on the GPIO pins would be 5V or 3.3V.
Thanks for the replies.
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lpcware
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Content originally posted in LPCWare by Wouter on Thu Feb 05 10:23:54 MST 2015
Note that you could configure the GPIO for open drain operation and use a pull-up resistor to set output voltage to any level you like (as long as you're in spec of course).
If you use any of the 5V tolerant GPIOs, you could even go beyond VDD. In that case do make sure VDD is always present if the GPIO voltage exceeds 3.6V
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lpcware
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Content originally posted in LPCWare by nerd herd on Fri Jan 30 08:20:25 MST 2015
Hi nicolasdarmadja,

The voltage level of a GPIO output can not be adjusted.
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