Hard fault instead of bus fault with LPC1788

[lpcware]

Content originally posted in LPCWare by masaz on Mon Dec 14 05:51:54 MST 2015
Hi all,

I am currently implementing fault handlers with my project and I have run into
a strange issue here. Even if I have enabled bus faults along with usage and
mem faults, any bus-fault type issue always results in hard fault. This I test
by reading from various unused addresses.

Now, I am fairly sure I have properly enabled bus fault, along with with usage/mem faults.
Usage and mem faults trigger as expected, but bus fault always triggers hardfault
even if it is enabled as well. In debugging this, I can see I have enabled bus fault, but
hard fault FORCED bit is nevertheless set and I can see also bus fault pending from
the registers.

I have also double checked that bus fault handler code does not trigger hard fault
by using the code for usage fault.

Anyone else run into same issue with LPC1788 ?

Br., Matti

[lpcware]

Content originally posted in LPCWare by masaz on Tue Dec 15 03:01:44 MST 2015
To provoke the faults, I do the following:

1) For bus fault, I have tried read / write various unused addresses, currently using 0x6000000. Hard fault always but showing that bus fault is pending.
2) For usage fault, div 0 is simple and usage fault resuts.
3) For memfault, I try to jump to system registers (0xE000000 somewhere) which are XN even without MPU, memfault results.

In fault handler, I store the fault info registers to
peripherals backed by battery and then wait in infinite loop until watchdog hits.

Br., Matti

[lpcware]

Content originally posted in LPCWare by vtw.433e on Tue Dec 15 01:42:23 MST 2015
So how are you trying to provoke the various faults?

This may help
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka14398.html

[lpcware]

Content originally posted in LPCWare by masaz on Tue Dec 15 00:13:41 MST 2015
Hi Mike,

Thanks for your reply.

Yes, this is roughly the way I set the bits. Also I have verified the bit is still set.
I set the priorities to 0. I have double checked the vector setting by exchanging
usage fault and bus fault vectors. Testing usage fault (div by 0) launched bus fault
handler nicely but bus fault test still resulted hard fault.

This is a bit tough.. I am using external SDRAM.. but there is no stacking error either.

Br., Matti

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Mon Dec 14 08:42:22 MST 2015
Stupid question ...

You have actually set handler address in the 4 vector slots.
Set priorities for the mm, bus, usage faults.

This is how I enable them.

movsr1, (1<<18)+(1<<17)+(1<<16); enable the fault handlers
strr1, [r3, sysFaultEnable];

It seems to work for me.

Mike.