Hi nxf46116,
Thank you for your reply! I still have some questions.
- In your capture the address + r/w bit is 252, which may mean master write to slave at address 0x7e. I don't know if it makes a big difference, but I was talking about master from slave read, when slave should keep the clock low as long as a buffer with data is not available.
- Where should the delay be added in the code? I guess not to he i2c slave callback, because of that's called from an ISR.
Best regards,
Zoltan