Does setting CRP2 in internal flash disable booting from USB and protect our software?

[lpcware]

Content originally posted in LPCWare by iemc on Thu Oct 15 14:00:46 MST 2015

Chips: LPC4357 and LPC4337 (1MB internal flash)
Manual: UM10503.pdf Rev. 1.9 — 18 February 2015

In the manual these two flow charts are the same.

Page 51: Fig 13. Boot process flowchart for LPC43xx parts with flash

Page 53: Fig 14. Boot process for parts without flash

Assuming P2_7 is high and valid user code is present in the internal flash (6.4.4.1 Criterion for Valid User Code), where in Fig 13 does the chip boot from the internal flash?

If the boot ROM checks BOOT_SRC first then would it be possible to boot from USB and bypass CRP2?

This would allow someone to put their own code into RAM by adjusting the boot pins P2_9, P2_8, P1_2 and P1_1 to boot from the USB. Their code could then extract the software from the internal flash.

Hopefully this is not the case and Fig 13 is incomplete.

[lpcware]

Content originally posted in LPCWare by iemc on Wed Oct 28 07:22:21 MST 2015
Thank you, that's good news.

[lpcware]

Content originally posted in LPCWare by bavarian on Wed Oct 28 06:12:00 MST 2015
Hi,

after a look at Fig. 13 I agree that this does not reflect the correct boot sequence for the flash parts.
As the text indicates, the bootloader always jumps to the internal flash first, if it finds a valid flash signature then it continues from there.
If CRPx is detected, then the respective functionality is disabled by the bootloader before starting from internal flash.
If there is no signature, it will follow the process which is also valid for the flashless parts.

So it is ensured that the bootloader can't be hijacked in order to bypass this code protection functionality.

We will correct the user manual.

Thanks and regards,
NXP Support Team.