DMA Link mode on 54102

[lpcware]

Content originally posted in LPCWare by jfavaro on Thu Jan 21 03:05:22 MST 2016
Hi,
i'm trying to set up the 54102 to obtain an DMA linked memory to memory transfer.
this is the code i used just to try a simple memory to memory transfer.
Using the debbugger i can see that the first transfer is correcty completed but the second one never start.

TxTest=0xA0A0A0A0;
RxTest=0;
RxTest1=0;

dmaDesc.source = DMA_ADDR((&TxTest));
//dmaDesc.dest = DMA_ADDR((&(LPC_SPIMASTERPORT->TXDATCTL)));

dmaDesc.dest = DMA_ADDR((&RxTest));
dmaDesc.next = DMA_ADDR(&(dmaDesc1));



dmaDesc1.xfercfg =(DMA_XFERCFG_CFGVALID | DMA_XFERCFG_WIDTH_32 |DMA_XFERCFG_SETINTA | DMA_XFERCFG_CLRTRIG  );
//dmaDesc1.source = DMA_ADDR(&(LPC_SPIMASTERPORT->RXDAT));
dmaDesc1.source = DMA_ADDR((&TxTest));

dmaDesc1.dest = DMA_ADDR(&RxTest1);


dmaDesc1.next= DMA_ADDR(0);


NVIC_EnableIRQ(DMA_IRQn);




/* Setup transfer descriptor and validate it */
Chip_DMA_SetupTranChannel(LPC_DMA, DMA_CH0, &dmaDesc);
Chip_DMA_SetValidChannel(LPC_DMA, DMA_CH0);
Chip_DMA_SetupChannelTransfer(LPC_DMA, DMA_CH0,(DMA_XFERCFG_CFGVALID | DMA_XFERCFG_WIDTH_32 )); //
/* Setup data transfer and software trigger in same call */

the structure i used for the descriptor is the default one used also in the DMA example

typedef struct {
uint32_t  xfercfg;/*!< Transfer configuration (only used in linked lists and ping-pong configs) */
uint32_t  source;/*!< DMA transfer source end address */
uint32_t  dest;/*!< DMA transfer desintation end address */
uint32_t  next;/*!< Link to next DMA descriptor, must be 16 byte aligned */
} DMA_CHDESC_T;

Any suggest ?

[lpcware]

Content originally posted in LPCWare by mckenney on Sat Mar 05 10:20:10 MST 2016
This is from the LPC824, but the two DMA engines look similar:

I recall I had to explicitly clear the completion status (INTA in your case) from the previous operation in order for a new operation to start. The symptom was what you describe: It just sat there and didn't start.