CRC setup for enhanced images

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CRC setup for enhanced images

Contributor II

Trying to boot a dual boot image with a CRC.

Situation: a firmware update image and a main image.

I swap back and forth by updating the "Boot block structure" version number. [ie if you go to boot mode and change your mind on reboot you will go back to the main image].

I have already setup and booted via dual image without the CRC so that part has been tested.

More or less I plan to inject the CRC into the Boot block structure after writing the main image to flash.

I have setup the main "Boot block structure" like so:

{0xFEEDA5A5, 0x00000000, 0x00000000, 0x8000, 0x00000000, 0x00000003 };

The value 0x8000 is the CRC length

The next index will hold the injected CRC

I use the LPC's CRC engine to get my CRC.

Here is the setup I used:

    config.polynomial = kCRC_Polynomial_CRC_32;
    config.reverseIn = false;
    config.complementIn = false;
    config.reverseOut = false;
    config.complementOut = false;
    config.seed = 0xFFFFFFFF;

    CRC_Init(CRC_ENGINE, &config);

Problem: On boot the image will no longer load.  Assume the CRCs do not match

Tried different CRC configurations, looked through the manual, online.... found nothing for a guiding light

where oh where is that little light of hope.

ps the CRC is suppose to solve the update getting interrupted and [from the customers perspective] bricking the device.

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4 Replies

Contributor II

Thank you for for the great reply.  I feel bad as I should have made my post and problem clearer.

I have the dual boot working without any CRC.  The problem I am having is when I enable the CRC the main image will no longer boot.

Here is the process.

1. MICRO boots to first image the "update image"

2. The update image loads the main image into the 0x10000 flash sector

When I have no CRC setup in the main image header everything works. ie on reboot we boot to the main image

3. To setup the CRC I use the 54606 internal CRC engine to generate a CRC starting at address 0x10000.

I then setup the main header with the CRC information.  The main header resides outside of what I CRC, so that is not a worry.

So the core problem is that updating the main header with CRC information causes the main image to not boot.

I am assuming that image does not boot due to CRC mismatch.

My assumptions:

The boot CRC uses the same internal 54606 CRC engine I am using [so it should be simple to make a matching CRC...].

The start address for the boot CRC is the start of my image ie 0x10000

The size of what I tell boot to CRC and what I tell the CRC engine to CRC are the same ie not off by 1 due to some nuance of operation.

If these assumptions are true the CRC mismatch should be a result of me setting up the CRC engine different than the boot.

For example: I assume the boot uses a Polynomial_CRC_32 not a 16 polynomial and that the seed is 0xFFFFFFFF.

I could not find any documentation that would tell me how the boot calculates the CRC on a image.

I did find documentation on size, stating location, and setting up the header for the boot CRC.

main header is setup like so:

//dual image     ,use crc         ,na               ,crc size ,crc value  ,version number

{0xFEEDA5A5, 0x00000000, 0x00000000, 0x8000, 0x00000000, 0x00000003 };


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NXP Employee
NXP Employee


Please check the chapter 18.6.4 "Plain Load Image" of the MCUXpresso IDE User Guide attached to this. 

I hope this helps, 



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Contributor II

I did not see anything dealing with the image CRC in that section.

But I have managed to work around my problem. 

By setting the "update image" to the highest version until the main image has been loaded and verified valid via a software MD5 check.  Should the download of the main firmware complete, be programmed into flash, and pass the MD5 check I set the main firmware to the highest version number, thus allowing main to load on boot.

NXP Employee
NXP Employee


For an image to be Dual Enhanced, it needs to have the Dual Enhanced image marker value (0x0FFEB6B6) at offset 0x24. It must also have a valid image header in the image pointed to at offset 0x28.

One of the images must start at sector 0. The other image must be aligned on a sector boundary and linked to run at the sector start address where the image is programmed. Either image can have optional new event handler table (256-Words aligned).

For Dual Enhanced image creation, two standalone images (Image1, Image2) should be created. The Image1 and Image2 has below arguments for CRC calculation.

IMAGE1 starts at FLASH sector 0

BOOTADDR = 0 (For all Single Enhanced image)

IMAGEHEADEROFFSET = 0x124 (Depict in address 0x28, ImageHeader offset)

IMAGE2 starts at FLASH sector X (e.g. 0x8000)


IMAGEHEADEROFFSET = BOOTADDR + 0x124 (Depict in address BOOTADDR + 0x28)

Based on legacy image creation, three additional steps are required to create a Single Enhanced image.

1. Add enhanced image flag

For Single Enhanced image, the boot address is 0, the enhanced image flag is at 0x24 and the pointer to image header is at 0x28.

 In MCUXPRESSO SDK project, these values can be edited in file “startup_LPC54608.s”.


2. Add Single Enhanced image header

Add Single Enhanced image header at end of ISR vector table in file “startup_LPC54608.s”


3. Processing Single Enhanced image.

For Dual Enhanced image creation,  Image1 creation procedures are similar to the Single Enhanced image creation which below has three steps, additional there are minor differences in step 1 and 2 as shown following figures. 



1. The image marker is 0x0FFEB6B6 in Dual Enhanced image.

2. Version information in image header is applicable.

As of Image2 creation, it can follow the procedures of Image1 creation to set up image flag and image marker. Moreover, as the BOOTADDR of Image2 is not 0 but FLASH sector X boundary, linker script changes are required.

The linker script file is “LPC54608J512_flash.scf” (KEIL) and in “lpc54608J512_flash.icf” (IAR). The address of m_interrupts_start should be set to BOOTADDR and other defined symbol should move forward in sequence.

I hope this helps, 



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