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Bootloader design for LPC54114 mutlicore application

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Bootloader design for LPC54114 mutlicore application

‎09-22-2020 09:32 PM
1,632 Views
ericchan
Contributor I

Dear NXP,

We are designing a bootloader for customer product firmware update. In LPC54114 mutlicore application, there are M4 and M0 core and they have their own output bin file (axf). The question is how to implement the bootloader design and which memory address the output files (M4 & M0) should flash in?

Thanks,

Eric

 

 

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‎09-24-2020 02:45 AM
1,624 Views
ZhangJennie
NXP TechSupport
NXP TechSupport

HI Eric

I suggest you refer AN12123

https://www.nxp.com/docs/en/application-note/AN12123.pdf

memory allocation is defined in "MCU settings" of each slave and master project,  for example

ZhangJennie_0-1600940583938.png

 

please note, you need build slave project first then build master project. master will link slave code. when download master code to flash, slave code will be download to flash as well.

 

Have a nice day,

Jun Zhang

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‎11-04-2020 01:28 AM
1,554 Views
mcpata2002
Contributor II

Hi NXP,

I think I am having a similar question as Eric while I have already had a working SBL for m4 only application firmware.

Now my problem is how should I IAP an application firmware that use both m4 and m0+ and how to invoke it from SBL?

Best Regards,

Ken

==========================

What I have done and achieved:

  • Hardware uses OM13089 the dev board;
  • Code base using with LPCOpen v3.01.000 for mcuxpresso;
  • Clone periph_blinky to a new project to start my Secondary Bootloader (SBL) project;
  • Copied all Chip_XXX() calls inside Board_XXX() to make sure SBL can run without calling any Board_XXX() function;
  • Define preprocessor NO_BOARD_LIB and removed all dependencies from project lpc_board_lpcxpresso_54114. This SBL project now only configured to link with lpc_chip_5411x;
  • Implemented USB HID and having a python program on PC that I can send application firmware (.bin files) to the board;
  • SBL use IAP to write the application firmware received from USB to Flash starting at address 0x8000;
  • SBL invoke application firmware by changing VTOR, __set_MSP(...), ... etc (ref: https://community.nxp.com/t5/LPC-Microcontrollers/Secondary-bootloader-error/m-p/558382)

Testing 1 - it works with GPIO:

  • Change the Flash location of example project periph_blinky to 0x8000, size 0x38000;
  • Change Post-build steps, uncomment arm-none-eabi-objcopy and checksum;
  • Build periph_blinky to obtain the .bin file;
  • Use python program to IAP this periph_blinky.bin to flash address starting at 0x8000
  • Reset the dev board, let SBL (at 0x0) jump to periph_blinky (at 0x8000)

Testing 2 - it works after adding PININT:

  • Add interrupt handling by copying related code from periph_pinint to periph_blinky
  • Build and test

Testing 3 - FAILED

  • Build multicore_m0slave_blinky;
  • Change flash address of project multicore_m4master_blinky to 0x8000;
  • Change Post-build steps;
  • Build the .bin file;
  • IAP to the board;
  • Reset the board, LED didn't blink, FAILED.
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