BUG: LPCOpen 2.06 LPC11U67

[lpcware]

Content originally posted in LPCWare by Belias on Tue Jun 24 07:26:30 MST 2014
The method void Chip_SYSCTL_SetPinInterrupt(uint32_t intno, uint8_t port, uint8_t pin) contains an error.

Through this error it wont configure PINs on Port 1 and 2 correctly.

The original version is:

void Chip_SYSCTL_SetPinInterrupt(uint32_t intno, uint8_t port, uint8_t pin) {
if (port == 0) {
/* Pins P0.1 to P0.23 only */
LPC_SYSCTL->PINTSEL[intno] = (uint32_t) pin;
} else {
/* P1.1 to P1.31 and P2.0 to P2.7 */
LPC_SYSCTL->PINTSEL[intno] = (uint32_t) ((port - 1) * 32 + pin);
}
}

The correct version is:

void Chip_SYSCTL_SetPinInterrupt(uint32_t intno, uint8_t port, uint8_t pin) {
if (port == 0) {
/* Pins P0.1 to P0.23 only */
LPC_SYSCTL->PINTSEL[intno] = (uint32_t) pin;
} else {
/* P1.1 to P1.31 and P2.0 to P2.7 */
LPC_SYSCTL->PINTSEL[intno] = (uint32_t) ((port - 1) * 32 + pin + 24);
}
}

Did cost me several hours because i trusted LPCOpen (currently porting a project from CMSIS to LPCOpen)

I hope this fix will be included soon!

[lpcware]

Content originally posted in LPCWare by sundarapandian on Tue Jun 24 11:52:00 MST 2014
Thank you for letting us know of this problem. The fix as shown below will be available in the next release

1. Removed function Chip_SYSCTL_SetPinInterrupt from syscon_11u6x.c
2. Removed prototype for Chip_SYSCTL_SetPinInterrupt from syscon_11u6x.h
3. Added the STATIC INLINE version of Chip_SYSCTL_SetPinInterrupt API to syscon_11u6x.h as shown below

/* PIO0_0 [Offset: 0]; PIO1_0 [Offset: 24(0x18)]; PIO2_0 [Offset: 56(0x38)] */
#define PINTSEL_OFFSET "\0\x18\x38"

STATIC INLINE void Chip_SYSCTL_SetPinInterrupt(uint32_t intno, uint8_t port, uint8_t pin)
{
       LPC_SYSCTL->PINTSEL[intno] = (uint32_t) PINTSEL_OFFSET[port] + pin;
}