4337 ADC problem with value returned and DONE status

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4337 ADC problem with value returned and DONE status

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by krhodesnb on Thu Jan 30 20:25:58 MST 2014
I have 2 problems with the ADC:
1) The Chip_ADC_ReadStatus returns that the ADC is ready immediately but the values aren't correct. If I put a 1mSec delay after starting the acquisition, it seems to have a fully calculated value
2) When the input voltage is 3.3v, the value read is 0 and when the input voltage is about 2v, the value read is 511. This seems inverted. When at 3.3v, it should read the full 10 bits (or 1023) and when at 2v, should be around 511

Below is the code I'm using, adapted from the 4370 examples and lpcopen 1.03 as there is none for the 4337.

Thanks...Keith

    int i, j;
    // Initialization
ADC_Clock_Setup_T ADCSetup;

Chip_ADC_Init(LPC_ADC0, &ADCSetup);
Chip_ADC_Set_SampleRate(LPC_ADC0, &ADCSetup, 4500000);
Chip_ADC_Set_Resolution(LPC_ADC0, &ADCSetup, ADC_10BITS);

const CHIP_ADC_CHANNEL_T channelIndex[5] = { ADC_CH4, ADC_CH3, ADC_CH5, ADC_CH2 };

    // walk thru each of 4 channels, getting the value of each
        for(i = 0;i<4;i++)
        {
// Tell ADC multiplexer which one to sample
Chip_SCU_ADC_Channel_Config(0, channelIndex);
Chip_ADC_Channel_Enable_Cmd(LPC_ADC0, channelIndex, ENABLE);

Chip_ADC_Burst_Cmd(LPC_ADC0, DISABLE);

Chip_ADC_Set_StartMode(LPC_ADC0, ADC_START_NOW, ADC_TRIGGERMODE_RISING);

for(j=0;j<MAX_KEYBOARD_CONVERT_LOOP;j++)
{
if(Chip_ADC_Read_Status(LPC_ADC0, channelIndex, ADC_DR_DONE_STAT) == SET)
{
/* Read ADC value */
if(SUCCESS == Chip_ADC_Read_Value(LPC_ADC0, channelIndex, &dataADC))
{
                                        // prints 0 when value is 3.3v, and 511 when value is 2v
printf("channel: %d, value: %d\n", channelindex, dataADC);
break;
}
}
}

Chip_ADC_Channel_Enable_Cmd(LPC_ADC0, channelIndex, DISABLE);
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Tue Feb 04 03:05:54 MST 2014
Then there's probably something wrong with your circuit.

It worked very nicely for me when I did some tests with the 4350 on an MCB4350 board. I got deviations from the expected ADC value of -3 to 2 LSB. The range was slightly compressed, contrary to what you are seeing. I.e., the ADC value became zero slightly above 0V and 1023 slightly below 3.3V. Linearity was very good, less than one LSB deviation from the best fit line. The sample rate was maxed out for 204MHz IIRC, so also around 400kHz.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by krhodesnb on Mon Feb 03 14:10:10 MST 2014
This has improved thing, but it still doesn't work as expected.

With 10 bits, and 400kHz sampling rate, 3.3v always returns 1012, which is close enough.

However with 0 volts, it returns 356, which is not what I expected. I would've expected a value closer to 0.

Thanks.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by krhodesnb on Sat Feb 01 03:47:41 MST 2014
OK, that makes sense.

Is there a block diagram available for the ADC operation? Is there any additional addendum aside from what is in the data sheet?

Thanks...
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Fri Jan 31 02:13:06 MST 2014
Your sample rate is too high.

4.5 MHz is the maximal ADC clock frequency. You need to divide that by the number of clocks needed per sample (11 at 10 bits) to get the maximal sample rate.
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