Setting FBI mode with SDK

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Setting FBI mode with SDK

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pietrodicastri
Senior Contributor II

Good morning

I try to execute this call with different values of fcrdivVal, the fourth parameters in the function.

 

    CLOCK_HAL_SetFbiMode(MCG_BASE, kMcgDcoRangeSelMid, kMcgInternalRefClkSelFast, 5, CLOCK_FllStableDelay, &outClkFreq );

 

It execute correctly with values from 0 to 5. The clock is 125 KHz with a value of 5.

If the fcrdivVal is 6 the clock is updated (32KHz), I see on the scope as CLOCKOUT, but the debugger looses the control.

Is it normal???

Solutions???

 

Thank You

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ivadorazinova
NXP Employee
NXP Employee

Hi Pietro,

Why do you change the divider when you use the FBI?

If you go to Reference Manual, page 593

http://cache.freescale.com/files/microcontrollers/doc/ref_manual/K64P144M120SF5RM.pdf

reference manual.png

so, the value for fcrdivVal = 6, output frequency cannot be 32KHz.

Because when the value is 5, 4MHz and Divide Factor is 32, is 125KHz. It is right.

BUT: when is the value 6, 4MHz and Divide Factor is 64, it is 62,5KHz, not 32KHz.

(4MHz : 64 = 62,5KHz)


As it is written in the Reference Manual : you have not change the divider when the Fast IRC is enabled. 


Please, look to SIM Module, Register SIM_CLKDIV1->OUTDIV4 what is your frequency divider for flash memory.


Best Regards,

Iva



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1,850 次查看
pietrodicastri
Senior Contributor II

Hi ..

I am still interested in some assistance.

Thank You

Pietro

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1,851 次查看
ivadorazinova
NXP Employee
NXP Employee

Hi Pietro,

Why do you change the divider when you use the FBI?

If you go to Reference Manual, page 593

http://cache.freescale.com/files/microcontrollers/doc/ref_manual/K64P144M120SF5RM.pdf

reference manual.png

so, the value for fcrdivVal = 6, output frequency cannot be 32KHz.

Because when the value is 5, 4MHz and Divide Factor is 32, is 125KHz. It is right.

BUT: when is the value 6, 4MHz and Divide Factor is 64, it is 62,5KHz, not 32KHz.

(4MHz : 64 = 62,5KHz)


As it is written in the Reference Manual : you have not change the divider when the Fast IRC is enabled. 


Please, look to SIM Module, Register SIM_CLKDIV1->OUTDIV4 what is your frequency divider for flash memory.


Best Regards,

Iva



1,850 次查看
pietrodicastri
Senior Contributor II

Hi Iva

Yes I should not divide in such condition. That's a good point.

Thank You

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pietrodicastri
Senior Contributor II

Hi Iva

Sorry. I will detail..

KDS Version: 2.0.0

SDK 1.1.0

Thank You

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Pietro,

Can you tell me the part number of the Kinetis and the version of SDK?

BR

XiangJun Rong

1,850 次查看
pietrodicastri
Senior Contributor II

Thank You for assistance

I am using the FRDM K64. I am debugging with the JTAG, in reduced version with only the two pins, as in the schematic.

I use the KDS.

I am suspicious the slow clock is not handled in this reduced JTAG connection...

Let me know

Best Regards

Pietro di Castri

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ivadorazinova
NXP Employee
NXP Employee

Hi Pietro,

like Rong said, we need exact information about versions, which you use.

KDS is IDE, Kinetis Design Studio and KSDK is Kinetis Software Development Kit.

You can find it on C:\Freescale and folders KDS_2.0.0 and KSDK_1.1.0.

Iva

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