Power down ADC

[tedmawson]

I've created a project that sets up the ADC16 to read a value 4 times a second triggered by a lptmr interrupt.  I go into VLPS mode once I've done my processing for each ¼ second interval and wait for the next lptmr interrup to occur but my power drwa is still way higher than I expected and I think a big part of that is becuase the ADC is still enabled.

I'd like to power down the ADC when I have done with it but then power it back up each ¼ second to take my reading.  Is there a simple way to achieve this that does not involve going through all the initialization and calibration routines?

[xiangjun_rong]

Hi, Ted,

I am sorry for the delay.

I do not know the part number you are using, anyway, the ADC16 module is similar.

Regarding the ADC configuration for low power mode, I suggest you use Asynchronous clock to save power by setting ADC_CFG1[ADICLK]=2b11, while clearing the ADC_CFG2[ADCACKEN] and ADC_CFG2[ADHSC]. You can also set the ADC_CFG1[ADLPC] bit. If you set the ADLPC bit, I suppose that the ADC clock should be less than 4MHz.

Hope it can help you

BR

XiangJun Rong