Incorrecte baudrate in FRDM-K64F flexcan example

[johanwallstrom]

Hi!

I'm trying to run the flexcan_loopback example in the SDK 2.0 IAR for FRDM-K64F.

I changed the UART instance to UART4, and changed the MUX for the correct pins, and activated the clocks for PORTE.
Despite that, no changes from standard. But the problem is, the output baudrate is half the specified.

In BOARD_InitDebugConsole, uartClkSrcFreq is set to 120MHz. I don't know if that is correct.

Any ideas? Is it system clock that is wrong or only the uart baudrate?

[johanwallstrom]

Hello,

that works perfectly!

Thank you so much!

best regards
Johan

[isaacavila · Accepted solution]

Hello Johan,

In K64's reference manual http://cache.freescale.com/files/microcontrollers/doc/ref_manual/K64P144M120SF5RM.pdf , there is a section called Clock distribution (chapter 5), in which, it specifies different clock sources for all available modules in K64. In section 5.7.10 UART clocking section, it expresses:

" UART0 and UART1 modules operate from the core/system clock, which provides higher performance level for these modules. All other UART modules operate from the bus clock."

And as MCU is operating in PEE modue, System clock is configured to 120MHz while Bus clock is set to 60MHz. So, source clock value is the problem you are facing.

You can substitute the definition:

#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq()

by:

#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetBusClkFreq()

Then recompile the project and it should be working well.

I hope this can help you!

Regards,

Isaac