FRDM-K64Z - PWM output using PTA0 (J2_2)

[shauldorf]

I’m reproducing PWM example provided by Freescale (NXP).

“PWM (FTM) example in Kinetis Design Studio with FDRM-K64F “, paper written by Paul Garate and Augusto Panecatl .

I want to redirect PWM output from PTD5 to PTA0 using the same channel #5.

Using PTA0 (J2_2) FTM0_Ch5 the program fails executing ”PORTA->PCR [0] = PORT_PCR_MUX (3);” (line #15) instruction.

SDA debugger is also disconnected for some reason.

When I change PWM to PTC1 (J1_5) FTM0_Ch0 or PTA1 (J1_8) FTM0_Ch6 the same program runs fine.

But when I try to use PTA0 (J2_2) FTM0_Ch5 the program fails executing” PORTA->PCR [0] = PORT_PCR_MUX (3);” (line #15) instruction. SDA debugger is disconnected for some reason.

In the same program by changing to output to PTA1 (and channel #6) everything is working fine.

For the reference I’m attaching my bare source code that’s run on KDS3.2 and KSDK v2.0.

Original Attachment has been moved to: main.c.zip

[pgo]

Hi Shaul,

Several of the PTA pins are used by the SWD debug interface on the K64F chip.  You can't use them for another function and use the debug interface at the same time. Additional pins are used if the JTAG interafce is used.

The usual way of using these pins in an application would be a load & go setup i.e. load a program and execute without debug function.

Sometimes using them for another function can make re-programming the chip difficult so it is best to avoid using them during development.

It is really an error on the FRDM board that PTA is brought out to the headers as it is not very practical to use for development.

PTA0= SWD_CLK

PTA3=SWD_DIO

bye

[shauldorf]

Thanks you are right it can be seen from schematics.

The origin to my problem was Mbed and Freescale reference pinout where J2_2 is asserted to PTA0.

And PTA0 in K64 Reference Manual can be configured as FTM0_Ch5.

Please look at the following Link

https://developer.mbed.org/questions/7074/Is-D8-actually-PTC12-and-not-PTA0/

Shaul